Opcode Definitions
   For each instruction opcode, this section provides the following
   information:
        • Opcode bits
        • Syntax
        • See also (related instruction reference pages)
   For mnemonics definitions, see “Opcode Mnemonics” on page 9-1.




9-20      ADSP-219x Instruction Set Reference
Type 1: Compute | DregX«···DM | DregY«···PM
   Multifunction ALU/MAC with DM and PM dual read with DAG1 and
   DAG2 postmodify
OPCODE BITS


    23      22    21        20       19        18       17        16   15        14   13     12      11
     1      1          PD                 DD                           AMF                        YOP


    10       9         8         7         6        5         4        3         2    1          0
            XOP                      PMI                PMM                DMI             DMM


   or for NOP only:

    23      22    21        20       19        18       17        16   15        14   13     12      11
     1      1          PD                 DD            0         0        0     0    0


    10       9         8         7         6        5         4        3         2    1          0
                                     PMI                PMM                DMI             DMM


SYNTAX

         |<ALU>, <MAC>|, Xop = DM(Ia += Mb), Yop = PM(Ic += Md);

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Compute with Dual Memory Read” on page 6-3
         • “Dual Memory Read” on page 6-7




                                       ADSP-219x Instruction Set Reference                           9-21
Instruction Opcodes




Type 3: Dreg/Ireg/Mreg «···» DM/PM
   Register read/write to immediate 16-bit address
OPCODE BITS


       23     22   21         20       19        18       17       16    15      14   13    12   11
       1      0    1           D                                    16-bit address


       10      9        8          7         6        5        4        3        2    1      0
                            16-bit address                                      IREG/MREG


   or:

       23     22   21         20       19        18       17       16    15      14   13    12   11
       1      0    0           D                                    16-bit address


       10     9    8           7       6         5        4        3        2    1    0
                       16-bit address                                       DREG


SYNTAX

           |DM(<Addr16>| = |Dreg, Ireg, Mreg|;

           |Dreg, Ireg, Mreg| = |DM(<Addr16>)|;

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Direct Memory Read/Write—Immediate Address” on page 7-24




9-22         ADSP-219x Instruction Set Reference
Type 4: Compute | Dreg «···» DM/PM
   Multifunction ALU/MAC with memory read or write using DAG
   postmodify
OPCODE BITS


    23      22   21   20   19   18   17   16        15    14       13   12     11
     0      1    1    G    D    Z                   AMF                      YOP


    10      9    8    7    6    5    4      3        2    1        0
           XOP              DREG                I              M


SYNTAX

         |<ALU>, <MAC> |, Dreg = |DM(Ia += Mb), PM(Ic += Md)|;

         |<ALU>, <MAC> |, |DM(Ia += Mb), PM(Ic += Md)| = Dreg;

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Compute with Memory Read” on page 6-10
         • “Compute with Memory Write” on page 6-14




                            ADSP-219x Instruction Set Reference               9-23
Instruction Opcodes




Type 6: Dreg «··· Data16
   Immediate register group 0 (Dreg) register load
OPCODE BITS


       23     22   21      20         19   18   17   16      15         14   13   12   11
       0       1    0       0                             16-bit data


       10      9    8       7         6    5    4    3        2         1    0
                        16-bit data                             DREG


SYNTAX

           <Dreg> = <Data16>;

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Direct Register Load” on page 7-27




9-24         ADSP-219x Instruction Set Reference
Type 7: Reg1/2 «··· Data16
   Immediate register group 1 or 2 (Ireg, Mreg, Lreg, IMASK, IRPTL, ICNTL,
   CNTR, STACKA, LPCSTACKA) register load

OPCODE BITS


     23     22   21      20         19   18   17   16      15         14   13   12    11
     0       1    0       1                             16-bit data


     10      9    8       7         6    5    4     3       2         1    0
                      16-bit data                               REG1


   or:

     23     22   21      20         19   18   17   16      15         14   13   12    11
     0       0    1       1                             16-bit data


     10      9    8       7         6    5    4     3       2         1    0
                      16-bit data                               REG2


SYNTAX

         | <Reg1>, <Reg2> | = <Data16>;

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Direct Register Load” on page 7-27




                                     ADSP-219x Instruction Set Reference             9-25
Instruction Opcodes




Type 8: Compute | Dreg1 «··· Dreg2
   ALU/MAC with data register move
OPCODE BITS


       23     22   21   20    19    18   17   16   15    14   13     12     11
       0       0    1    0    1     Z              AMF                    YOP


       10      9    8    7    6     5    4    3     2    1    0
             XOP              DDREG                 SDREG


   or, generate ALU/MAC status only

       23     22   21   20    19    18   17   16   15    14   13     12     11
       0       0    1    0    1     Z              AMF                    YOP


       10      9    8    7    6     5    4    3     2    1    0
             XOP         1    0     1    0    1     0    1    0


SYNTAX

           | <ALU>, <MAC> |, Dreg = Dreg;

           NONE = ALU (Xop, Yop);

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Compute with Register to Register Move” on page 6-18
           • “Generate ALU Status Only: NONE” on page 3-44




9-26         ADSP-219x Instruction Set Reference
Type 9: Compute
  Conditional ALU/MAC
OPCODE

  Conditional ALU/MAC

   23    22    21      20       19       18       17       16       15       14   13   12        11
    0    0     1       0         0       Z                      AMF                         YOP


   10     9        8        7        6        5        4        3        2        1    0
         XOP                0        0        0        0                 COND


  Conditional ALU/MAC operations using constant YOP

   23    22    21      20       19       18       17       16       15       14   13   12        11
    0    0     1       0         0       Z                      AMF                         YY


   10     9        8        7        6        5        4        3        2        1    0
         XOP                    CC                BO                     COND


  Conditional ALU/MAC operations with YOP=0

   23    22    21      20       19       18       17       16       15       14   13   12        11
    0    0     1       0         0       Z                      AMF                    1          1


   10     9        8        7        6        5        4        3        2        1    0
         XOP                0        0        0        0                 COND




                                 ADSP-219x Instruction Set Reference                         9-27
Instruction Opcodes




   Conditional MAC squaring operations only

       23     22    21      20       19       18       17       16       15       14   13   12   11
       0       0    1       0        0        Z                      AMF                    0    0


       10      9        8        7        6        5        4        3        2        1    0
              XOP                0        0        0        1                 COND


SYNTAX

           [IF Cond] |AR, AF| = Xop + |Yop, Yop + C, C, Const, Const + C|;
           [IF Cond] |AR, AF| = Xop − |Yop,Yop+C−1,+C−1,Const, Const+C−1|;
           [IF Cond] |AR, AF| = Yop − |Xop, Xop+C−1|;
           [IF Cond] |AR, AF| = − |Xop+C−1, Xop+Const, Xop+Const+C−1|;
           [IF Cond] |AR, AF| = Xop |AND, OR, XOR| |Yop, Const|;
           [IF Cond] |AR, AF| = PASS |Xop, Yop, Const|;
           [IF Cond] |AR, AF| = NOT |Xop, Yop|;
           [IF Cond] |AR, AF| = ABS Xop;
           [IF Cond] |AR, AF| = Yop +1;
           [IF Cond] |AR, AF| = Yop −1;
           [IF Cond] |MR, SR| = Xop * Yop [(|RND, SS, SU, US, UU|)];
           [IF Cond] |MR, SR| = Yop * Xop [(|RND, SS, SU, US, UU|)];
           [IF Cond]|MR, SR| = |MR, SR| + Xop * Yop [(|RND,SS,SU,US,UU|)];
           [IF Cond] |MR, SR| = |MR, SR| + Yop * Xop [(|RND,SS,SU,US,UU|)];
           [IF Cond] |MR, SR| = |MR, SR| − Xop * Yop [(|RND,SS,SU,US,UU|)];
           [IF Cond] |MR, SR| = |MR, SR| − Yop * Xop [(|RND,SS,SU,US,UU|)];
           [IF Cond] |MR, SR| = 0;
           [IF Cond] MR = MR [(RND)];
           [IF Cond] SR = SR [(RND)];

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Add/Add with Carry” on page 3-5
           • “Subtract X-Y/Subtract X-Y with Borrow” on page 3-8
           • “Subtract Y-X/Subtract Y-X with Borrow” on page 3-12




9-28         ADSP-219x Instruction Set Reference
• “Bitwise Logic: AND, OR, XOR” on page 3-15
• “Bit Manipulation: TSTBIT, SETBIT, CLRBIT, TGLBIT” on
  page 3-18
• “Clear: PASS” on page 3-20
• “Negate: NOT” on page 3-23
• “Absolute Value: ABS” on page 3-26
• “Increment” on page 3-29
• “Decrement” on page 3-32
• “Multiply” on page 4-8
• “Multiply with Cumulative Add” on page 4-11
• “Multiply with Cumulative Subtract” on page 4-14
• “MAC Clear” on page 4-17
• “MAC Round/Transfer” on page 4-19




                    ADSP-219x Instruction Set Reference   9-29
Instruction Opcodes




Type 9a: Compute
   Unconditional ALU/MAC
OPCODE

   Register file ALU/MAC

       23     22     21       20       19       18       17       16       15       14   13         12
       0       0      1       0        0        Z                      AMF                          Y0


       11      10         9        8        7        6        5        4        3        2          1    0
                   XREG                                       1        0                     YREG


   Register file ALU/MAC with XREG=0

       23     22     21       20       19       18       17       16       15       14   13         12
       0       0      1       0        0        Z                      AMF                          Y0


       11      10         9        8        7        6        5        4        3        2          1    0
                                                              1        0                     YREG


SYNTAX

           |AR, AF| = Dreg1 + |Dreg2, Dreg2 + C, C |;
           |AR, AF| = Dreg1 − |Dreg2, Dreg2 + C −1, +C −1|;
           |AR, AF| = Dreg2 − |Dreg1, Dreg1 + C −1|;
           |AR, AF| = Dreg1 |AND, OR, XOR| Dreg2;
           |AR, AF| = PASS |Dreg1, Dreg2, Const|;
           |AR, AF| = PASS 0;
           |AR, AF| = NOT |Dreg|;
           |AR, AF| = ABS Dreg;
           |AR, AF| = Dreg +1;
           |AR, AF| = Dreg −1;
           |MR, SR| = Dreg1 * Dreg2 [(|RND, SS, SU, US, UU|)];
           |MR, SR| = |MR, SR| + Dreg1 * Dreg2 [(|RND, SS, SU, US, UU|)];
           |MR, SR| = |MR, SR| − Dreg1 * Dreg2 [(|RND, SS, SU, US, UU|)];




9-30         ADSP-219x Instruction Set Reference
SEE ALSO

      • “Opcode Mnemonics” on page 9-1
      • “Add/Add with Carry” on page 3-5
      • “Subtract X-Y/Subtract X-Y with Borrow” on page 3-8
      • “Subtract Y-X/Subtract Y-X with Borrow” on page 3-12
      • “Bitwise Logic: AND, OR, XOR” on page 3-15
      • “Clear: PASS” on page 3-20
      • “Negate: NOT” on page 3-23
      • “Absolute Value: ABS” on page 3-26
      • “Increment” on page 3-29
      • “Decrement” on page 3-32
      • “Multiply” on page 4-8
      • “Multiply with Cumulative Add” on page 4-11
      • “Multiply with Cumulative Subtract” on page 4-14




                          ADSP-219x Instruction Set Reference   9-31
Instruction Opcodes




Type 10: Direct Jump
   13-bit relative conditional/unconditional jump with delayed branch
   option
OPCODE


       23     22   21        20     19   18   17   16   15    14      13      12   11
       0       0    0         1      1   0    B              13-bit address


       10     9     8         7      6   5    4    3    2      1       0
                        13-bit address                   COND


SYNTAX

           [IF Cond] JUMP <Reladdr13> [(DB)];

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Direct JUMP (PC relative)” on page 8-27




9-32         ADSP-219x Instruction Set Reference
Type 10a: Direct Jump/Call
   16-bit relative conditional/unconditional jump with delayed branch
   option
OPCODE


    23      22   21        20     19       18   17   16   15     14      13      12    11
     0       0    0         1      1       1                14-bit address


    10      9     8         7      6       5    4     3    2      1          0
                      14-bit address                  B    S       2MSBs


SYNTAX

         CALL <Reladdr16> [(DB)];

         JUMP <Reladdr16> [(DB)];

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “CALL (PC relative)” on page 8-30
         • “JUMP (PC relative)” on page 8-34




                                       ADSP-219x Instruction Set Reference            9-33
Instruction Opcodes




Type 11: Do ··· Until
   12-bit relative conditional DO
OPCODE BITS


       23     22   21        20     19   18   17   16   15   14      13      12   11
       0      0     0         1      0   1    1    0            12-bit address


       10     9    8          7      6   5    4    3    2    1        0
                        12-bit address                   TERM


SYNTAX

           DO <Reladdr12> UNTIL [CE, FOREVER];

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “DO UNTIL (PC relative)” on page 8-22




9-34         ADSP-219x Instruction Set Reference
Type 12: Shift | Dreg «···» DM/PM
   Shift with memory read/write using DAG postmodify
OPCODE BITS


    23      22   21   20   19   18   17   16        15   14        13   12    11
     0      0    0    1    0    0     1     G                 SF              D


    10      9    8    7    6    5    4      3       2    1         0
           XOP              DREG                I             M


SYNTAX

         <SHIFT> , Dreg = |DM(Ia += Mb), PM(Ic += Md)|;

         <SHIFT> , |DM(Ia += Mb), PM(Ic += Md)| = Dreg;

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Compute with Memory Read” on page 6-10
         • “Compute with Memory Write” on page 6-14
         • “XOP/YOP codes” on page 9-19




                            ADSP-219x Instruction Set Reference              9-35
Instruction Opcodes




Type 14: Shift | Dreg1 «··· Dreg2
   Register file shift with data register move
OPCODE BITS


       23     22   21   20    19   18    17      16   15   14        13   12
       0       0    0    1    0    1     0       0              SF


       11     10    9    8    7    6     5       4    3    2         1    0
               XREG                 DDREG                   SDREG


SYNTAX

           <SHIFT>, Dreg = Dreg;

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Compute with Register to Register Move” on page 6-18




9-36         ADSP-219x Instruction Set Reference
Type 15: Shift Data8
   Immediate register file shift
OPCODE BITS


    23      22   21    20    19    18   17   16     15   14        13   12
     0       0    0    0     1     1    1    1                SF


    11      10    9    8     7     6    5    4      3    2         1    0
              XREG                           Exponent


SYNTAX

         SR = [SR OR] ASHIFT BY <Imm8> [(|HI, LO|)];

         SR = [SR OR] LSHIFT BY <Imm8> [(|HI, LO|)];

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Arithmetic Shift Immediate” on page 5-8
         • “Logical Shift Immediate” on page 5-12




                              ADSP-219x Instruction Set Reference            9-37
Instruction Opcodes




Type 16: Shift Reg0
   Conditional register file shift
OPCODE BITS


       23     22    21   20   19     18     17   16   15   14        13   12
       0       0    0     0    1     1      1    0              SF


       11     10    9    8     7     6      5    4    3    2         1    0
                XREG                                        COND


SYNTAX

           [IF Cond] SR = [SR OR] ASHIFT Dreg [(|HI, LO|)];

           [IF Cond] SR = [SR OR] LSHIFT Dreg [(|HI, LO|)];

           [IF Cond] SR = [SR OR] NORM Dreg [(|HI, LO|)];

           [IF Cond] SE = [SR OR] EXP Dreg [(|HIX, HI, LO|)];

           [IF Cond] SB = [SR OR] EXPADJ Dreg;

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Arithmetic Shift” on page 5-6
           • “Logical Shift” on page 5-10
           • “Normalize” on page 5-14
           • “Exponent Derive” on page 5-20
           • “Exponent (Block) Adjust” on page 5-23




9-38         ADSP-219x Instruction Set Reference
Type 17: Any Reg «··· Any Reg
   General register move
OPCODE BITS


    23      22   21      20      19   18   17   16   15    14   13      12
     0       0    0          0   1    1     0    1


    11      10    9      8       7    6    5     4    3    2     1      0
      DRGP            SRGP            DDREG                 SDREG


SYNTAX

         Reg = Reg;

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Register to Register Move” on page 7-22




                                  ADSP-219x Instruction Set Reference        9-39
Instruction Opcodes




Type 18: Mode Change
   Mode control
OPCODE BITS


       23        22   21        20   19        18   17        16   15        14   13     12
       0         0    0         0    1         1    0         0         TI             MM


       11        10   9         8    7         6    5         4    3         2    1          0
            AS             OL             BR             SR             SD             INT


SYNTAX

           ENA | TI, MM, AS, OL, BR, SR, SD, INT | ;

           DIS | TI, MM, AS, OL, BR, SR, SD, INT |;

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Mode Control” on page 8-69




9-40         ADSP-219x Instruction Set Reference
Type 19: Indirect Jump/Call
   Conditional indirect jump/call with delayed branch option
OPCODE BITS


    23      22   21   20   19   18   17    16    15       14   13   12
     0       0    0    0    1    0    1     1    B        S    G


    11      10   9     8    7    6    5     4    3        2    1    0
                                 COND                 I


SYNTAX

         [IF Cond] CALL <Ireg> [(DB)];

         [IF Cond] JUMP <Ireg> [(DB)];

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Indirect CALL” on page 8-42
         • “Indirect JUMP” on page 8-45




                            ADSP-219x Instruction Set Reference          9-41
Instruction Opcodes




Type 20: Return
   Conditional return from interrupt/return from subroutine with delayed
   branch option
OPCODE BITS


       23     22   21   20    19   18   17   16      15   14   13   12
       0       0    0    0    1     0    1    0      B    T    Q


       11     10    9    8    7    6     5    4      3    2    1    0
                                    COND


SYNTAX

           [IF Cond] RTI [(DB)];

           [IF Cond] RTS [(DB)];

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Return from Interrupt” on page 8-48
           • “Return from Subroutine” on page 8-52




9-42         ADSP-219x Instruction Set Reference
Type 21: Modify DagI
   DAG modify
OPCODE BITS


    23      22   21   20    19   18   17   16   15       14   13       12
     0       0    0    0    0    0     0    1    1            G


    11      10    9    8    7    6    5     4    3       2    1        0
                                                     I             M


SYNTAX

         |MODIFY (Ia += Mb), MODIFY (Ic += Md)|;

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Modify Address Register—indirect” on page 7-63




                             ADSP-219x Instruction Set Reference            9-43
Instruction Opcodes




Type 21a: Modify DagI
   DAG modify immediate value
OPCODE BITS


       23     22   21   20   19    18   17   16    15       14   13   12
       0       0    0    0    0    0     0    1    0             G


       11     10    9    8    7    6     5    4    3        2    1    0
                        MOD DATA                        I


SYNTAX

           MODIFY (Ireg += <Imm8>);

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Modify Address Register—direct” on page 7-65




9-44         ADSP-219x Instruction Set Reference
Type 22: DM/PM «··· Data16
   16-bit immediate data indirect memory write (two-word instruction)
   using DAG postmodify addressing
OPCODE

   First word: 16-bit data write

    23      22   21    20    19     18   17    16    15       14   13       12
     0       0    0    0     0      1    1      1    1        0    G


    11      10    9    8     7      6    5      4    3        2    1        0
                      8 DATA LSBs                         I             M


   Second word: 16-bit data write

    23      22   21    20    19     18   17    16    15       14   13       12
                                              8 DATA MSBs


    11      10    9    8     7      6    5      4    3        2    1        0




SYNTAX

         |DM(Ia += Mb), DM (Ic += Md)| = <Data16>;

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Indirect 16-bit Memory Write—immediate data” on page 7-55




                              ADSP-219x Instruction Set Reference                9-45
Instruction Opcodes




Type 22a: DM/PM «··· Data24
   24-bit immediate data indirect memory write (two-word instruction)
   using DAG postmodify addressing
OPCODE

   First word: 24-bit data write

       23     22    21     20    19      18   17    16    15         14   13       12
       0       0    0       0    0       1    1      1    1          1    G


       11     10    9      8     7       6    5      4    3          2    1        0
                         8 DATA MidSBs                           I             M


   Second word: 24-bit data write

       23     22    21     20    19      18   17    16    15         14   13       12
                                                   8 DATA MSBs


       11     10    9      8     7       6    5      4    3          2    1        0
                                                   8 DATA LSBs


SYNTAX

           |PM (Ia += Mb), PM (Ic += Md)| = <Data24>:24;


   ! The     syntax at the end of the line is required for 24-bit data. If
                   :24
     omitted, 24-bit data is truncated by the assembler.
SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Indirect 24-bit Memory Write—immediate data” on page 7-57




9-46         ADSP-219x Instruction Set Reference
Type 23: Divide primitive, DIVQ
   DIVQ divide primitive
OPCODE BITS


    23      22   21      20   19   18   17   16   15    14   13      12
     0       0       0   0    0    0     1    1    1    1     0      1


    11      10   9       8    7    6    5     4    3    2     1      0
     0           XOP


SYNTAX

         DIVQ Xop;

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Divide Primitives: DIVS and DIVQ” on page 3-35




                               ADSP-219x Instruction Set Reference        9-47
Instruction Opcodes




Type 24: Divide primitive, DIVS
   DIVS divide primitive
OPCODE BITS


       23     22   21   20      19   18   17   16   15   14   13   12     11
       0       0    0       0   0    0    1    1    1    0     0        YOP


       10     9    8     7      6    5    4    3    2    1     0
             XOP


SYNTAX

           DIVS Yop, Xop;

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Divide Primitives: DIVS and DIVQ” on page 3-35




9-48         ADSP-219x Instruction Set Reference
Type 25: Saturate
   Saturate MR/SR on overflow
OPCODE BITS


    23      22     21   20   19   18   17   16   15    14   13      12
     0       0     0    0    0    0     1    1    0    R


    11      10     9    8    7    6    5     4    3    2     1      0




SYNTAX

         SAT MR;

         SAT SR;

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “MAC Saturate” on page 4-21




                              ADSP-219x Instruction Set Reference        9-49
Instruction Opcodes




Type 26:Push/Pop/Cache
   Stack control
OPCODE BITS


       23     22   21     20   19   18         17   16     15      14   13     12
       0      0     0     0    0    1          0    0


       11     10   9      8    7    6          5    4          3   2    1          0
                               CF        PPP             LPP                 SPP


SYNTAX

           PUSH |PC, LOOP, STS|;

           POP |PC, LOOP, STS|;

           FLUSH CACHE;

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “PUSH or POP Stacks” on page 8-55
           • “FLUSH CACHE” on page 8-61




9-50         ADSP-219x Instruction Set Reference
Type 29: Dreg «···» DM
   Memory read/write with immediate modify (postmodify with update or
   premodify offset)
OPCODE BITS


    23      22   21   20   19    18   17   16   15        14   13     12
     0      0    0     0   1     0    0     U        DRU       G          D


    11      10   9     8   7     6    5     4    3         2   1          0
                      MOD DATA                        I             DRL


SYNTAX

         Dreg = DM(Ireg += <Imm8>);        /* postmodify read */

         DM(Ireg += <Imm8>) = Dreg;        /* postmodify write */

         Dreg = DM(Ireg + <Imm8>);         /* premodify read */

         DM(Ireg + <Imm8>) = Dreg;         /* premodify write */

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Indirect Memory Read/Write—immediate postmodify” on
           page 7-49
         • “Indirect Memory Read/Write—immediate premodify” on
           page 7-52




                            ADSP-219x Instruction Set Reference               9-51
Instruction Opcodes




Type 30: NOP
   No operation
OPCODE BITS


       23     22      21   20   19   18   17   16   15   14   13   12
       0          0   0    0    0    0    0    0


       11     10      9    8    7    6    5    4    3    2    1    0
                                                          SWCD


SYNTAX

           NOP;

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “No Operation” on page 8-66




9-52         ADSP-219x Instruction Set Reference
Type 31: Idle
   Idle
OPCODE BITS


   23      22   21   20   19     18    17   16   15   14       13   12
   0       0    0    0    0       0    1    0


   11      10   9    8    7      6     5    4    3     2       1    0
                                                  IDLE VALUE


SYNTAX

        IDLE;

SEE ALSO

        • “Opcode Mnemonics” on page 9-1
        • “Idle” on page 8-67




                               ADSP-219x Instruction Set Reference       9-53
Instruction Opcodes




Type 32: Any Reg «···» PM/DM
   DAG memory read/write with premodify offset or postmodify update
OPCODE


       23     22     21      20   19     18      17   16        15   14       13   12   11
       0       0         0   1    0          1   0    1         MS   U        G    D    0


       10     9          8   7    6          5   4    3         2    1        0
                   RGP                 REG                  I             M


SYNTAX

           |DM(Ia += Mb), DM(Ic += Md)| = Reg; /*postmodify write,16-bit*/

           Reg = |DM(Ia += Mb), DM(Ic += Md)|; /*premodify read,16-bit*/

           |DM(Ia + Mb), DM(Ic + Md)| = Reg;               /*premodify write,16-bit*/

           Reg = |DM (Ia + Mb), DM (Ic + Md)|; /*postmodify read,16-bit */

           |PM(Ia += Mb), PM(Ic += Md)| = Reg; /*postmodify write,24-bit*/

           Reg = |PM(Ia += Mb), PM(Ic += Md)|; /*premodify read,24-bit*/

           |PM(Ia + Mb), PM(Ic + Md)| = Reg;               /*premodify write,24-bit*/

           Reg = |PM(Ia + Mb), PM(Ic + Md)|;               /*postmodify read,24-bit*/

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Indirect 16-bit Memory Read/Write—postmodify” on page 7-30
           • “Indirect 16-bit Memory Read/Write—premodify” on page 7-34
           • “Indirect 24-bit Memory Read/Write—postmodify” on page 7-37
           • “Indirect 24-bit Memory Read/Write—premodify” on page 7-41



9-54         ADSP-219x Instruction Set Reference
Type 32a: DM«···DAG Reg | DAG Reg«···Ireg
   DAG register store with register transfer
OPCODE


    23      22     21      20   19   18   17   16       15   14       13   12    11
     0       0         0   1    0    1     0    1       0    U        G    1      1


    10       9         8   7    6    5    4     3       2    1        0
     0           RGP            DAG REG             I             M


SYNTAX

         DM(Ireg1 += Mreg1) = |Ireg2, Mreg2, Lreg2|,
          |Ireg2, Mreg2, Lreg2|= Ireg1 ;

         DM(Ireg1 += Mreg1) = |Ireg2, Mreg2, Lreg2|,
          |Ireg2, Mreg2, Lreg2| = Ireg1 ;

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Indirect DAG Register Write (premodify or postmodify), with
           DAG Register Move” on page 7-45




                                 ADSP-219x Instruction Set Reference            9-55
Instruction Opcodes




Type 33: Reg3 «··· Data12
   Load short constants
OPCODE BITS


       23     22   21      20         19   18   17   16   15     14      13         12   11
       0       0    0       1         0    0    0    0                12-bit data


       10      9    8       7         6    5    4    3    2      1        0
                        12-bit data                           REG3


SYNTAX

           Reg3 = <Data12>;

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Direct Register Load” on page 7-27




9-56         ADSP-219x Instruction Set Reference
Type 34: Dreg «···» IOreg
   I/O register read/write
OPCODE BITS


    23      22   21    20     19      18   17   16   15   14    13     12
     0       0    0     0      0      1    1    0    1    2MSBs addr   D


    11      10    9    8       7      6    5    4    3     2     1     0
                      8-bit Address                         DREG


SYNTAX

         IO(<Addr10>) = Dreg;

         Dreg = IO (<Addr10>);

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “External IO Port Read/Write” on page 7-59




                                ADSP-219x Instruction Set Reference         9-57
Instruction Opcodes




Type 35: Dreg «···»Sreg
   System control register read/write
OPCODE BITS


       23     22   21    20     19      18   17   16   15   14   13   12
       0       0    0     0      0      1    1    0    0              D


       11     10    9    8       7      6    5    4    3    2    1    0
                        8-bit Address                        DREG


SYNTAX

           REG(<Addr8>) = Dreg;

           Dreg = REG(<Addr8>);

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “System Control Register Read/Write” on page 7-61




9-58         ADSP-219x Instruction Set Reference
Type 36: Long Jump/Call
   Conditional long jump/call (two-word instruction)
OPCODE BITS

         • First word

    23      22   21     20     19       18   17     16     15       14   13   12
     0       0    0      0      0       1    0       1                        S


    11      10   9       8      7       6    5       4      3       2    1    0
                      8 Address MSBs                                 COND


         • Second word

    23      22   21     20     19       18   17     16     15       14   13   12
                                                  16 Address LSBs


    11      10   9       8      7       6    5       4      3       2    1    0
                      16 Address LSBs


SYNTAX

         [IF Cond] LJUMP <Addr24>;

         [IF Cond] LCALL <Addr24>;

SEE ALSO

         • “Opcode Mnemonics” on page 9-1
         • “Long CALL” on page 8-37
         • “Long JUMP” on page 8-40




                                ADSP-219x Instruction Set Reference                9-59
Instruction Opcodes




Type 37: Interrupt
   Software interrupt
OPCODE BITS


       23     22   21    20     19   18     17   16   15   14     13      12
       0       0    0       0   0    1      1    1    0


       11     10    9    8      7    6      5    4    3    2          1   0
                                            C                   BIT


SYNTAX

           SETINT <Imm4>;

           CLRINT <Imm4>;

SEE ALSO

           • “Opcode Mnemonics” on page 9-1
           • “Set Interrupt” on page 8-62
           • “Clear Interrupt” on page 8-64




9-60         ADSP-219x Instruction Set Reference
ADSP-219x Instruction Set Reference   9-61
Instruction Opcodes




9-62   ADSP-219x Instruction Set Reference
