From 6849a701d4b95ac043e2ab1cac1fc02198879b97 Mon Sep 17 00:00:00 2001 From: "Dr. Christian Giessen" Date: Wed, 22 Apr 2026 19:47:12 +0000 Subject: [PATCH] Fix Type 1 AMF bitfield and add real FIR/IIR test ROMs - Fix Type 1 multifunction: AMF=bits17-13, DD=bits19-18, PD=bits21-20 (was off by one bit, causing wrong MAC decode on real firmware) - Add FIR filter ROM (fir.bin): 52 instructions, assembled from AD example - Add IIR biquad ROM (iir.bin): 28 instructions, assembled from AD example - Add open21xx-compatible source files (build/fir.dsp, build/iir.dsp) - Both ROMs disassemble correctly showing expected DSP patterns: MAC+dual-read kernels, DO UNTIL loops, ASHIFT scaling, RTS(DB) - Full regression: isa_test.bin unchanged --- examples/build/fir.bin | Bin 0 -> 156 bytes examples/build/fir.dsp | 69 +++++++++++++++++++++++++++++++++++++++ examples/build/iir.bin | Bin 0 -> 84 bytes examples/build/iir.dsp | 41 +++++++++++++++++++++++ examples/build/link.ldf | 9 +++++ examples/fir.bin | Bin 0 -> 156 bytes examples/iir.bin | Bin 0 -> 84 bytes r2plugin/asm_adsp219x.c | 11 ++++--- r2plugin/asm_adsp219x.so | Bin 24416 -> 24416 bytes 9 files changed, 126 insertions(+), 4 deletions(-) create mode 100644 examples/build/fir.bin create mode 100644 examples/build/fir.dsp create mode 100644 examples/build/iir.bin create mode 100644 examples/build/iir.dsp create mode 100644 examples/build/link.ldf create mode 100644 examples/fir.bin create mode 100644 examples/iir.bin diff --git a/examples/build/fir.bin b/examples/build/fir.bin new file mode 100644 index 0000000000000000000000000000000000000000..9911211c8f215352887754edcca0acb719d7ef43 GIT binary patch literal 156 zcmWF#Ud)Im|yL0yJ{0RWD-EUN$j literal 0 HcmV?d00001 diff --git a/examples/build/fir.dsp b/examples/build/fir.dsp new file mode 100644 index 0000000..e32cfb9 --- /dev/null +++ b/examples/build/fir.dsp @@ -0,0 +1,69 @@ +/* + * fir.dsp -- ADSP-2191 FIR filter adapted for open21xx assembler. + * Based on Analog Devices application note. + */ + .section/PM program0; + .global _start; +_start: + /* Setup DAGs */ + i0 = 0x0100; /* delay line */ + i1 = 0x0200; /* input samples */ + i2 = 0x0300; /* output */ + i4 = 0x0400; /* coefficients (PM) */ + l0 = 31; /* circular buffer length */ + l4 = 31; + m0 = 1; + m1 = 1; + m3 = -1; + m4 = 1; + + /* FIR kernel */ + mr = 0, mx0 = dm(i1,m1), my0 = pm(i4,m4); + dm(i0,m3) = mx0; + cntr = 40; + do _mult_acc until ce; + + /* Inner loop: 30 taps (unrolled) */ + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4); + + /* Last tap + output chain */ + mr=mr+mx0*my0(ss), mx0=dm(i0,m1), my0=pm(i4,m4); + sr=ashift mr2 (hi), mx0=dm(i1,m1); + sr=sr or lshift mr1 (lo), dm(i0,m3) = mx0; +_mult_acc: + mr = 0, dm(i2,m1) = sr0; + rts (db); + mx0 = dm(i0,m1); + mx0 = dm(i1,m3); + +_halt: + jump _halt; diff --git a/examples/build/iir.bin b/examples/build/iir.bin new file mode 100644 index 0000000000000000000000000000000000000000..eee45972a46e256c044e45c0c24515e4480adecb GIT binary patch literal 84 zcmWF#U!z3mFrHT?$?@Fl2IG77aMf)$oA<3}hG>0O@)XO8@`> literal 0 HcmV?d00001 diff --git a/examples/build/iir.dsp b/examples/build/iir.dsp new file mode 100644 index 0000000..5a5b7bf --- /dev/null +++ b/examples/build/iir.dsp @@ -0,0 +1,41 @@ +/* + * iir.dsp -- ADSP-2191 IIR biquad filter for open21xx. + * Based on Analog Devices application note. + */ + .section/PM program0; + .global _start; +_start: + /* Setup */ + i0 = 0x0100; /* delay line */ + i1 = 0x0200; /* input */ + i2 = 0x0300; /* output */ + i4 = 0x0400; /* coefficients (PM) */ + l0 = 4; /* 2 * biquad_secs */ + l4 = 8; /* 4 coeffs per biquad * 2 */ + m0 = 1; + m1 = 1; + m3 = -1; + m4 = 1; + + se = 0; + cntr = 256; + do _filtering until ce; + mx0 = dm(i1,m3); + my0 = 0x2000; + cntr = 2; + mr = mx0*my0(su), mx0 = dm(i0,m3), my0 = pm(i4,m4); + do _quads until ce; + mr = mr+mx0*my0(ss), mx1 = dm(i0,m3), my0 = pm(i4,m4); + mr = mr+mx1*my0(ss), my0 = pm(i4,m4); + sr = ashift mr1 (hi), my1 = pm(i4,m4); + mr = mr+mx0*my0(ss), mx0 = dm(i0,m0), my0 = pm(i4,m4); +_quads: + dm(i0,m3) = sr1, mr = mr+mx1*my1(ss); +_filtering: + dm(i2,m3) = mr1; + rts (db); + nop; + nop; + +_halt: + jump _halt; diff --git a/examples/build/link.ldf b/examples/build/link.ldf new file mode 100644 index 0000000..4fa7fbb --- /dev/null +++ b/examples/build/link.ldf @@ -0,0 +1,9 @@ +MEMORY +{ + int_pm { TYPE(PM RAM) START(0x000000) LENGTH(0x004000) WIDTH(24) } + int_dm { TYPE(DM RAM) START(0x000000) LENGTH(0x004000) WIDTH(16) } +} +SECTIONS +{ + program0 { INPUT_SECTIONS( $OBJECTS(program0) ) } > int_pm +} diff --git a/examples/fir.bin b/examples/fir.bin new file mode 100644 index 0000000000000000000000000000000000000000..9911211c8f215352887754edcca0acb719d7ef43 GIT binary patch literal 156 zcmWF#Ud)Im|yL0yJ{0RWD-EUN$j literal 0 HcmV?d00001 diff --git a/examples/iir.bin b/examples/iir.bin new file mode 100644 index 0000000000000000000000000000000000000000..eee45972a46e256c044e45c0c24515e4480adecb GIT binary patch literal 84 zcmWF#U!z3mFrHT?$?@Fl2IG77aMf)$oA<3}hG>0O@)XO8@`> literal 0 HcmV?d00001 diff --git a/r2plugin/asm_adsp219x.c b/r2plugin/asm_adsp219x.c index 0a31e91..a2ccc28 100644 --- a/r2plugin/asm_adsp219x.c +++ b/r2plugin/asm_adsp219x.c @@ -83,15 +83,18 @@ decode (RArchSession *as, RAnalOp *op, RAnalOpMask mask) } /* Type 1: Compute | DM | PM (11xxxx) */ + /* PD=bits21-20, DD=bits19-18, AMF=bits17-13, YOP=bits12-11, + XOP=bits10-8, PMI=bits7-6, PMM=bits5-4, DMI=bits3-2, DMM=bits1-0 */ if (b23_22 == 3) { - ut32 amf = (ins >> 12) & 0x1F; - const char *f = (amf < 16) ? amf_mac[amf] : amf_alu[amf-16]; + ut32 amf = (ins >> 13) & 0x1F; + const char *f = (amf < 16) ? amf_mac[amf] : amf_alu[amf - 16]; int dmi = (ins >> 2) & 3, dmm = ins & 3; int pmi = (ins >> 6) & 3, pmm = (ins >> 4) & 3; - int dd = (ins >> 17) & 3, pd = (ins >> 19) & 3; + int dd = (ins >> 18) & 3, pd = (ins >> 20) & 3; op->mnemonic = r_str_newf ("%s, %s=DM(I%d+=M%d), %s=PM(I%d+=M%d)", - f, reg0[dd], dmi, dmm, reg0[pd+4], pmi+4, pmm+4); + f, reg0[dd], dmi, dmm, + reg0[pd + 4], pmi + 4, pmm + 4); return true; } diff --git a/r2plugin/asm_adsp219x.so b/r2plugin/asm_adsp219x.so index 08914ba492dfae4e098a3820c8b3c672a85a89ff..dddd5ccbc7aea4c0a7e37e829c7c44da15245562 100755 GIT binary patch delta 4243 zcmZ`+dvH|M8NWBXo9u?{-axVtBDhf!F~}op5-N^6%|aHIy1Z4Yv{gZAor!g-;A<*N zJa@6D>#EFct^QG_Xls3x+7enrI)>b69!RAL?V!*>V=!>&HdQ){b2ItZ^sb zx47X4SsQ(FgLdG$Q1mCVBn6efcj-O(dau*fH~#(aw;EUU)b1~ zO;I`4*;tmMI8pvp!U@N@Y7FeGGsshs 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