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Fix Type 12 SF field and sync TESTING.md

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Type 12: SF is 4 bits (15-12), D is bit11 (not SF=3bits, D=bit12).
  Verified all 8 SF variants against assembler: LSHIFT/ASHIFT,
  HI/LO, plain/OR.  FIR output scaling chain now correct.

TESTING.md: Synced with actual verification status.
  34 of 37 types now assembler-verified.
  Only Type 22/22a (2-word data write), Type 31 (IDLE), and
  Type 32a (DAG store+transfer) remain structural-only.

Removed build artifacts (.o, .elf) from examples/build/.
This commit is contained in:
Dr. Christian Giessen
2026-04-22 20:19:41 +00:00
parent 9a82c4d522
commit 6dd976fcf6
6 changed files with 47 additions and 37 deletions
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55
r2plugin/TESTING.md
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@@ -16,50 +16,37 @@ Structural = implemented from reference docs, no assembler test.
| 10 | Conditional jump (13-bit rel) | Verified | isa_test.bin |
| 10a | Unconditional jump (16-bit) | Verified | isa_test.bin |
| 11 | DO UNTIL (12-bit rel) | Verified | isa_test.bin, fir.bin |
| 12 | Shift + DM/PM | Structural | — |
| 14 | Shift + Dreg move | Structural | — |
| 12 | Shift + DM/PM | Verified | shift_sf_test.dsp, fir |
| 14 | Shift + Dreg move | Verified | verify_gaps.dsp |
| 15 | Shift immediate | Verified | isa_test.bin |
| 16 | Conditional shift | Structural | — |
| 16 | Conditional shift | Verified | verify_gaps.dsp |
| 17 | Reg = Reg | Verified | isa_test.bin |
| 18 | Mode control (ENA/DIS) | Verified | type18_test.dsp |
| 19 | Indirect jump/call | Structural | — |
| 19 | Indirect jump/call | Verified | verify_gaps.dsp |
| 20 | RTS/RTI | Verified | isa_test.bin, fir.bin |
| 21 | MODIFY (Ireg += Mreg) | Structural | — |
| 21a | MODIFY (Ireg += Imm8) | Structural | — |
| 21 | MODIFY (Ireg += Mreg) | Verified | verify_gaps.dsp |
| 21a | MODIFY (Ireg += Imm8) | Verified | verify_gaps.dsp |
| 22 | DM = Data16 (2-word) | Structural | — |
| 22a | PM = Data24 (2-word) | Structural | — |
| 23 | DIVQ | Structural | — |
| 24 | DIVS | Structural | — |
| 23 | DIVQ | Verified | verify_gaps.dsp |
| 24 | DIVS | Verified | verify_gaps.dsp |
| 25 | SAT MR/SR | Verified | isa_test.bin |
| 26 | Push/Pop/Flush Cache | Structural | — |
| 29 | DM read/write imm modify | Structural | — |
| 26 | Push/Pop/Flush Cache | Verified | verify_gaps.dsp |
| 29 | DM read/write imm modify | Verified | verify_gaps.dsp |
| 30 | NOP | Verified | isa_test.bin |
| 31 | IDLE | Structural | — |
| 32 | Any Reg <-> DM/PM (DAG) | Structural | — |
| 32 | Any Reg <-> DM/PM (DAG) | Verified | verify_gaps.dsp |
| 32a | DAG reg store + transfer | Structural | — |
| 33 | Reg3 = Data12 | Verified | isa_test.bin |
| 34 | IO register read/write | Structural | — |
| 35 | System register read/write | Structural | — |
| 36 | Long jump/call (2-word) | Structural | — |
| 37 | SETINT/CLRINT | Structural | — |
| 34 | IO register read/write | Verified | verify_gaps.dsp |
| 35 | System register read/write | Verified | verify_gaps.dsp |
| 36 | Long jump/call (2-word) | Verified | verify_gaps.dsp |
| 37 | SETINT/CLRINT | Verified | verify_gaps.dsp |
## Priority gaps for assembler verification
## Remaining structural-only types
High (used in real firmware, likely to encounter):
- Type 12: Shift + memory (common in FIR output scaling)
- Type 29: DM immediate modify (common for stack-like access)
- Type 32: Any Reg <-> DM/PM (general register save/restore)
- Type 19: Indirect jump (function pointer dispatch)
Medium (less common but structurally complex):
- Type 22/22a: 2-word immediate write (initialization code)
- Type 36: Long jump/call (large firmware images)
- Type 32a: DAG store + transfer (DSP loop setup)
Low (rare or simple):
- Type 16: Conditional shift
- Type 21/21a: MODIFY
- Type 23/24: DIVQ/DIVS
- Type 26: Push/Pop
- Type 34/35: IO/System registers
- Type 37: SETINT/CLRINT
- Type 22/22a: 2-word immediate data write. No open21xx syntax
equivalent found for testing.
- Type 31: IDLE. Trivial encoding, low risk.
- Type 32a: DAG register store with transfer. Tightly constrained
discriminator (bits 15=0, 12-11=11, 10=0), low overlap risk.

9
r2plugin/asm_adsp219x.c
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@@ -445,12 +445,15 @@ decode (RArchSession *as, RAnalOp *op, RAnalOpMask mask)
return true;
}
/* Type 12: Shift | DM/PM (bits 23-17 = 0001001) */
/* Type 12: Shift | DM/PM (bits 23-17 = 0001001)
G=bit16, SF=bits15-12 (4 bits, same as sf_names[]),
D=bit11 (0=read, 1=write), XOP=bits10-8 (xop_shift),
DREG=bits7-4, I=bits3-2, M=bits1-0. */
if ((ins >> 17) == 0x09)
{
ut32 g = (ins >> 16) & 1;
ut32 sf = (ins >> 13) & 0x7;
ut32 d = (ins >> 12) & 1;
ut32 sf = (ins >> 12) & 0xF;
ut32 d = (ins >> 11) & 1;
ut32 xop_i = (ins >> 8) & 0x7;
ut32 dreg = (ins >> 4) & 0xF;
ut32 ireg = (ins >> 2) & 0x3;

BIN
r2plugin/asm_adsp219x.so
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