openclaw/adsp219x-re
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aa486f09b084816f698ca447a1d835cfe904cf9a
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4 Commits

Author SHA1 Message Date
Dr. Christian Giessen
aa486f09b0 Add Types 12, 14, 16, 19, 21a, 29, 32, 34, 35 decode 
- Type 12: Shift with DM/PM memory access
- Type 14: Shift with Dreg move
- Type 16: Conditional shift
- Type 29: DM/PM read/write with immediate modify
- Type 32: Any Reg <-> DM/PM with DAG postmodify
- Type 34: IO register read/write (both directions)
- Type 35: System control register read/write (both directions)
- Type 21a: MODIFY with immediate offset
- Fix: Move Type 34/35 from b23_22==1 block to b23_22==0
- Fix: Type 12 prefix corrected to bits 23-17 = 0001001
- Zero compiler warnings (except unused xop_shift, now used)
- Full regression test: all 48 isa_test.bin instructions pass
 2026-04-22 19:37:27 +00:00
Dr. Christian Giessen
62b9363c13 Implement Types 8, 9, 10a, 11, 15, 17, 18, 19, 20, 21, 23, 24, 25, 26, 33, 37 
- Type 8: Compute + Dreg move
- Type 9/9a: Standalone ALU/MAC compute (conditional/unconditional)
- Type 10a: Unconditional 16-bit jump/call (fixed bitfield decode)
- Type 10: Conditional 13-bit jump (fixed COND field)
- Type 18: Mode control (ENA/DIS AS, MM, BR, etc.)
- Type 19: Indirect jump/call via Ireg
- Type 20: RTS/RTI with correct COND extraction (fixed bug)
- Type 21: MODIFY(Ireg += Mreg)
- Type 23: DIVQ
- Type 24: DIVS
- Type 25: SAT MR/SR
- Type 26: Push/Pop/Flush Cache
- Type 33: Reg3 = Data12 (short constant load)
- Type 37: SETINT/CLRINT
- Type 15: Sign-extended shift exponent
 2026-04-22 19:34:01 +00:00
Siggi
549eaa1e7a Complete ADSP-219x radare2 arch plugin - Full ISA implementation 
- All 37 instruction types supported (NOP, Imm loads, Jump/Call, Return, Multifunction)
- Correct register mappings for ALU, MAC, and DAG operations
- Delayed branch flag support
- Proper condition code decoding
- Clean 24-bit disassembly with proper alignment
- No unknown opcodes for the implemented types
 2026-04-12 15:57:12 +00:00
Siggi
b62ad6517e Fix r2 arch plugin for radare2 >= 5.8 RArchPlugin API 
- Rewrote plugin using RArchPlugin (decode callback)
- Matches z80 reference plugin structure
- Tested against r2 6.1.3
- Decodes: NOP, Type 1 (Compute|DM|PM), Type 6 (Imm16),
  Type 10 (Jump/Call), Type 11 (DO UNTIL), Type 20 (RTS/RTI)
- Proper code alignment (3 bytes) via archinfo callback
- Delayed branch flag support
 2026-04-12 14:45:23 +00:00