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2 Commits

Author SHA1 Message Date
14694fcbc4 Fix CNTR opcode in ISA test ROM 2026-04-22 22:43:15 +02:00
de06753520 Clean up plugin build workflow and docs 2026-04-22 22:39:53 +02:00
9 changed files with 49 additions and 16 deletions

3
.gitignore vendored Normal file
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@@ -0,0 +1,3 @@
r2plugin/*.so
examples/build/*.o
examples/build/*.elf

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@@ -24,14 +24,23 @@ engineering ADSP-2191 firmware.
## Plugin Status
Currently decodes: NOP, IDLE, Type 1 (multifunction), Type 3
(direct memory), Type 4 (compute + memory), Type 6/7 (immediate
loads), Type 10/10a (jump/call), Type 17 (reg move), Type 20
(RTS/RTI).
The decoder now covers most ADSP-219x instruction types and has
assembler verification for 34 of 37 documented opcode families.
Work in progress: Type 9/9a (standalone compute), Type 11
(DO UNTIL), Type 15 (shift), Type 18 (mode control), Type 25
(saturate).
Assembler-verified coverage includes:
- Types 1, 3, 4, 6, 7, 8, 9, 9a, 10, 10a, 11, 12, 14, 15, 16,
17, 18, 19, 20, 21, 21a, 23, 24, 25, 26, 29, 30, 32, 33, 34,
35, 36, 37
Structural-only coverage remains for:
- Type 22 / 22a (2-word immediate data write)
- Type 31 (IDLE)
- Type 32a (DAG register store with transfer)
For the current verification matrix and test inputs, see
`r2plugin/TESTING.md`.
## Assembler

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@@ -1,15 +1,24 @@
NAME=asm_adsp219x
R2_PLUGINS=$(shell r2 -H R2_USER_PLUGINS)
R2_INCDIR=$(shell r2 -H R2_INCDIR)
R2_LIBDIR=$(shell r2 -H R2_LIBDIR)
NAME ?= asm_adsp219x
CC ?= gcc
CFLAGS ?= -Wall -Wextra -O2 -fPIC
LDFLAGS ?=
LDLIBS ?= -lr_arch -lr_util
R2_PLUGINS := $(shell r2 -H R2_USER_PLUGINS)
R2_INCDIR := $(shell r2 -H R2_INCDIR)
R2_LIBDIR := $(shell r2 -H R2_LIBDIR)
CPPFLAGS += -I$(R2_INCDIR) -I$(R2_INCDIR)/sdb
all: $(NAME).so
$(NAME).so: $(NAME).c
gcc -shared -Wall -O2 -fPIC \
-I$(R2_INCDIR) -I$(R2_INCDIR)/sdb \
$(CC) $(CPPFLAGS) $(CFLAGS) -shared $(LDFLAGS) \
-L$(R2_LIBDIR) \
$(NAME).c -o $@ -lr_arch -lr_util
$< -o $@ $(LDLIBS)
test: $(NAME).so
r2 -q -a adsp219x -L ./$(NAME).so -b 24 -c "pd 48" ../examples/isa_test.bin >/dev/null
install: $(NAME).so
mkdir -p $(R2_PLUGINS)
@@ -21,4 +30,4 @@ uninstall:
clean:
rm -f $(NAME).so
.PHONY: all install uninstall clean
.PHONY: all test install uninstall clean

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@@ -10,6 +10,9 @@ ADSP-2191) 24-bit instructions in radare2 and iaito.
Requires: GCC, radare2 >= 5.8.0 (RArchPlugin API).
The `Makefile` also provides `make test`, which builds the plugin and
runs a smoke test against `../examples/isa_test.bin`.
## Usage
r2 -a adsp219x -b 24 firmware.bin
@@ -20,9 +23,16 @@ Compare against the assembler-verified test ROM:
r2 -a adsp219x -b 24 -q -c "pd 48" ../examples/isa_test.bin
Or run the local plugin without installing it:
make test
The test ROM (`isa_test.dsp`) was assembled with open21xx and
contains known opcodes for all major instruction types.
For the current verification matrix and remaining structural-only
types, see `TESTING.md`.
## Coding Standards
This plugin follows the GNU Coding Standards for C source code.

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@@ -64,6 +64,7 @@ get_reg (int gp, int idx)
static bool
decode (RArchSession *as, RAnalOp *op, RAnalOpMask mask)
{
(void) as;
ut32 ins, ins2 = 0;
const ut8 *b = op->bytes;
int avail = op->size;
@@ -814,6 +815,7 @@ decode (RArchSession *as, RAnalOp *op, RAnalOpMask mask)
static int archinfo (RArchSession *s, ut32 q)
{
(void) s;
switch (q) {
case R_ARCH_INFO_CODE_ALIGN: return 3;
case R_ARCH_INFO_MINOP_SIZE: case R_ARCH_INFO_MAXOP_SIZE: return 3;

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@@ -31,7 +31,7 @@ VERIFIED_OPCODES = [
(0x300014, "M4 = 1"),
(0x500008, "L0 = 0"),
(0x300008, "L4 = 0"),
(0x3000AE, "CNTR = 10"),
(0x5000AF, "CNTR = 10"),
# Type 17: Reg = Reg
(0x0D00A0, "AR = AX0"),
(0x0D00B1, "SI = AX1"),

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