# Decoder Test Coverage

Verified = disassembly checked against open21xx assembler output.
Structural = implemented from reference docs, no assembler test.

| Type | Description                    | Status     | Test file              |
|------|--------------------------------|------------|------------------------|
| 1    | Compute + DM + PM             | Verified   | fir.bin, iir.bin       |
| 3    | Direct memory read/write      | Verified   | fir.bin (DM writes)    |
| 4    | Compute + DM/PM postmodify    | Verified   | fir.bin, iir.bin       |
| 6    | Dreg = Imm16                  | Verified   | isa_test.bin           |
| 7    | Reg1/Reg2 = Imm16             | Verified   | isa_test.bin           |
| 8    | Compute + Dreg move           | Verified   | type8_test.dsp         |
| 9    | Conditional compute            | Verified   | type9_test.dsp         |
| 9a   | Unconditional register compute | Verified   | type9_test.dsp         |
| 10   | Conditional jump (13-bit rel) | Verified   | isa_test.bin           |
| 10a  | Unconditional jump (16-bit)   | Verified   | isa_test.bin           |
| 11   | DO UNTIL (12-bit rel)         | Verified   | isa_test.bin, fir.bin  |
| 12   | Shift + DM/PM                 | Structural | —                      |
| 14   | Shift + Dreg move             | Structural | —                      |
| 15   | Shift immediate               | Verified   | isa_test.bin           |
| 16   | Conditional shift             | Structural | —                      |
| 17   | Reg = Reg                     | Verified   | isa_test.bin           |
| 18   | Mode control (ENA/DIS)        | Verified   | type18_test.dsp        |
| 19   | Indirect jump/call            | Structural | —                      |
| 20   | RTS/RTI                       | Verified   | isa_test.bin, fir.bin  |
| 21   | MODIFY (Ireg += Mreg)         | Structural | —                      |
| 21a  | MODIFY (Ireg += Imm8)         | Structural | —                      |
| 22   | DM = Data16 (2-word)          | Structural | —                      |
| 22a  | PM = Data24 (2-word)          | Structural | —                      |
| 23   | DIVQ                          | Structural | —                      |
| 24   | DIVS                          | Structural | —                      |
| 25   | SAT MR/SR                     | Verified   | isa_test.bin           |
| 26   | Push/Pop/Flush Cache          | Structural | —                      |
| 29   | DM read/write imm modify      | Structural | —                      |
| 30   | NOP                           | Verified   | isa_test.bin           |
| 31   | IDLE                          | Structural | —                      |
| 32   | Any Reg <-> DM/PM (DAG)       | Structural | —                      |
| 32a  | DAG reg store + transfer      | Structural | —                      |
| 33   | Reg3 = Data12                 | Verified   | isa_test.bin           |
| 34   | IO register read/write        | Structural | —                      |
| 35   | System register read/write    | Structural | —                      |
| 36   | Long jump/call (2-word)       | Structural | —                      |
| 37   | SETINT/CLRINT                 | Structural | —                      |

## Priority gaps for assembler verification

High (used in real firmware, likely to encounter):
- Type 12: Shift + memory (common in FIR output scaling)
- Type 29: DM immediate modify (common for stack-like access)
- Type 32: Any Reg <-> DM/PM (general register save/restore)
- Type 19: Indirect jump (function pointer dispatch)

Medium (less common but structurally complex):
- Type 22/22a: 2-word immediate write (initialization code)
- Type 36: Long jump/call (large firmware images)
- Type 32a: DAG store + transfer (DSP loop setup)

Low (rare or simple):
- Type 16: Conditional shift
- Type 21/21a: MODIFY
- Type 23/24: DIVQ/DIVS
- Type 26: Push/Pop
- Type 34/35: IO/System registers
- Type 37: SETINT/CLRINT