9a82c4d522
Assembler-verified and fixed: - Type 12: XOP field corrected to bits10-8 (was bits11-9) - Type 14: SF=4bits, XREG uses reg0[] not xop_shift[] (was 3-bit OOB) - Type 16: XREG uses reg0[] (was xop_shift[], 4-bit index OOB) - Type 19: I-reg field at bits3-2 (was bits1-0), now correct for jump(i2) - Type 26: Push/Pop encoding is 10/11 not 01/10; PPP=bits6-5, LPP=bits4-3 (was bits6-4, bits3-2) All 6 variants verified: push/pop sts, loop, pc Assembler-verified unchanged: - Type 21/21a: MODIFY correct - Type 23/24: DIVQ/DIVS correct - Type 29: DM immediate modify read/write correct - Type 32: Any Reg <-> DM read/write correct - Type 34/35: IO/System register read/write correct - Type 36: LJUMP 2-word correct - Type 37: SETINT/CLRINT correct Remaining note: Type 12 SF field may use a different mapping than sf_names[] for combined shift+memory ops (ASHIFT encodes as SF=2 not SF=4). Needs further investigation.
84 lines
1.3 KiB
Plaintext
84 lines
1.3 KiB
Plaintext
/*
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* verify_gaps.dsp -- Assembler verification for structural-only types.
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* Tests Types 12, 14, 16, 19, 21, 21a, 22, 23, 24, 26, 29, 32, 34, 35, 36, 37.
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*/
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.section/PM program0;
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.global _start;
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_start:
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/* Setup */
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i0 = 0x0100;
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i4 = 0x0200;
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m0 = 1;
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m4 = 1;
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l0 = 0;
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l4 = 0;
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ax0 = 0x1234;
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si = 0x00FF;
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/* Type 12: Shift + DM read */
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sr = lshift si (hi), mx0 = dm(i0,m0);
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/* Type 12: Shift + DM write */
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sr = ashift si (hi), dm(i0,m0) = ax0;
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/* Type 14: Shift + Dreg move */
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sr = lshift si (hi), ax0 = mx0;
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/* Type 16: Conditional shift */
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if eq sr = lshift si (hi);
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sr = lshift si (hi);
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/* Type 19: Indirect jump */
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i2 = _after_indirect;
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jump (i2);
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_after_indirect:
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nop;
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/* Type 21: MODIFY (reg) */
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modify(i0,m0);
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/* Type 21a: MODIFY (imm) */
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modify(i0,5);
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/* Type 23: DIVQ */
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divq ax0;
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/* Type 24: DIVS */
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divs ay0, ax0;
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/* Type 26: Push/Pop */
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push sts;
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pop sts;
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push loop;
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pop loop;
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push pc;
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pop pc;
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/* Type 29: DM immediate modify */
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ax0 = dm(i0,1);
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dm(i0,1) = ax0;
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/* Type 32: Any Reg <-> DM (postmodify) */
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ar = dm(i0,m0);
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dm(i0,m0) = ar;
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/* Type 34: IO */
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ax0 = io(0x00);
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io(0x00) = ax0;
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/* Type 35: System register */
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ax0 = reg(0x00);
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reg(0x00) = ax0;
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/* Type 37: SETINT/CLRINT */
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setint 3;
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clrint 3;
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/* Type 36: Long jump */
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ljump _end;
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_end:
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nop;
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_halt:
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jump _halt;
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