Complete Yocto mirror with license table for TQMa6UL (2038-compliance)
- 264 license table entries with exact download URLs (224/264 resolved) - Complete sources/ directory with all BitBake recipes - Build configuration: tqma6ul-multi-mba6ulx, spaetzle (musl) - Full traceability for Softwarefreigabeantrag - GCC 13.4.0, Linux 6.6.102, U-Boot 2023.04, musl 1.2.4 - License distribution: GPL-2.0 (24), MIT (23), GPL-2.0+ (18), BSD-3 (16)
This commit is contained in:
Siggi (OpenClaw Agent)
@@ -0,0 +1,42 @@
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From 2d305094f8f500362079e9e7637d46129bf980e4 Mon Sep 17 00:00:00 2001
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From: Adam Johnston <adam.johnston@arm.com>
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Date: Tue, 25 Jul 2023 16:05:51 +0000
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Subject: [PATCH] n1sdp: Reserve OP-TEE memory from NWd
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The physical memory which is used to run OP-TEE on the N1SDP is known
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to the secure world via TOS_FW_CONFIG, but it may not be known to the
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normal world.
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As a precaution, explicitly reserve this memory via NT_FW_CONFIG to
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prevent the normal world from using it. This is not required on most
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platforms as the Trusted OS is run from secure RAM.
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Upstream-Status: Pending (not yet submitted to upstream)
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Signed-off-by: Adam Johnston <adam.johnston@arm.com>
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Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
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---
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plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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diff --git a/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts b/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts
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index da5e04ddb6..b7e2d4e86f 100644
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--- a/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts
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+++ b/plat/arm/board/n1sdp/fdts/n1sdp_nt_fw_config.dts
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@@ -20,4 +20,16 @@
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local-ddr-size = <0x0>;
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remote-ddr-size = <0x0>;
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};
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+
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+ reserved-memory {
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+ #address-cells = <2>;
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+ #size-cells = <2>;
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+ ranges;
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+
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+ optee@0xDE000000 {
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+ compatible = "removed-dma-pool";
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+ reg = <0x0 0xDE000000 0x0 0x02000000>;
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+ no-map;
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+ };
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+ };
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};
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\ No newline at end of file
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@@ -0,0 +1,46 @@
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From cc0153b56d634aa80b740be5afed15bedb94a2c9 Mon Sep 17 00:00:00 2001
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From: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
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Date: Tue, 23 Jan 2024 14:19:39 +0000
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Subject: [PATCH] n1sdp patch tests to skip
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Upstream-Status: Pending
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Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>
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---
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plat/arm/n1sdp/tests_to_skip.txt | 15 ++++++++++-----
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1 file changed, 10 insertions(+), 5 deletions(-)
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diff --git a/plat/arm/n1sdp/tests_to_skip.txt b/plat/arm/n1sdp/tests_to_skip.txt
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index b6e87bf..1848408 100644
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--- a/plat/arm/n1sdp/tests_to_skip.txt
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+++ b/plat/arm/n1sdp/tests_to_skip.txt
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@@ -11,7 +11,7 @@ SMMUv3 tests
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PSCI CPU Suspend in OSI mode
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# PSCI is enabled but not tested
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-PSCI STAT/Stats test cases after system suspend
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+PSCI STAT
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PSCI System Suspend Validation
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# Disable FF-A Interrupt tests as TWDOG is not supported by TC platform
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@@ -25,9 +25,14 @@ FF-A Interrupt
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# files in TFTF, since the port was done purely to test the spectre workaround
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# performance impact. Once that was done no further work was done on the port.
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-Timer framework Validation/Target timer to a power down cpu
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-Timer framework Validation/Test scenario where multiple CPUs call same timeout
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-Timer framework Validation/Stress test the timer framework
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+Timer framework Validation
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PSCI Affinity Info/Affinity info level0 powerdown
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PSCI CPU Suspend
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-PSCI STAT/for valid composite state CPU suspend
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+Framework Validation/NVM serialisation
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+Framework Validation/Events API
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+Boot requirement tests
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+CPU Hotplug
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+ARM_ARCH_SVC/SMCCC_ARCH_WORKAROUND_1 test
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+ARM_ARCH_SVC/SMCCC_ARCH_WORKAROUND_2 test
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+ARM_ARCH_SVC/SMCCC_ARCH_WORKAROUND_3 test
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+FF-A Power management
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--
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2.34.1
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@@ -0,0 +1,30 @@
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From 15dab90c3cb8e7677c4f953c2269e8ee1afa01b0 Mon Oct 2 13:45:43 2023
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From: Mariam Elshakfy <mariam.elshakfy@arm.com>
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Date: Mon, 2 Oct 2023 13:45:43 +0000
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Subject: [PATCH] Modify BL32 Location to DDR4
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Since OP-TEE start address is changed to run
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from DDR4, this patch changes BL32 entrypoint
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to the correct one.
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Upstream-Status: Pending (not yet submitted to upstream)
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Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
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---
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plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts b/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
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index ed870803c..797dfe3a4 100644
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--- a/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
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+++ b/plat/arm/board/n1sdp/fdts/n1sdp_optee_spmc_manifest.dts
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@@ -22,8 +22,8 @@
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maj_ver = <0x1>;
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min_ver = <0x0>;
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exec_state = <0x0>;
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- load_address = <0x0 0x08000000>;
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- entrypoint = <0x0 0x08000000>;
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+ load_address = <0x0 0xDE000000>;
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+ entrypoint = <0x0 0xDE000000>;
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binary_size = <0x2000000>;
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};
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@@ -0,0 +1,28 @@
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From 9a1d11b9fbadf740c73aee6dca4fd0370b38e4a8 Tue Oct 3 13:49:13 2023
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From: Mariam Elshakfy <mariam.elshakfy@arm.com>
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Date: Tue, 3 Oct 2023 13:49:13 +0000
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Subject: [PATCH] Modify SPMC Base to DDR4
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Since OP-TEE start address is changed to run
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from DDR4, this patch changes SPMC base to
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the correct one.
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Upstream-Status: Pending (not yet submitted to upstream)
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Signed-off-by: Mariam Elshakfy <mariam.elshakfy@arm.com>
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---
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plat/arm/board/n1sdp/include/platform_def.h | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/plat/arm/board/n1sdp/include/platform_def.h b/plat/arm/board/n1sdp/include/platform_def.h
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index b3799a7b2..b12c61b61 100644
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--- a/plat/arm/board/n1sdp/include/platform_def.h
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+++ b/plat/arm/board/n1sdp/include/platform_def.h
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@@ -118,7 +118,7 @@
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#define PLAT_ARM_MAX_BL31_SIZE UL(0x40000)
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-#define PLAT_ARM_SPMC_BASE U(0x08000000)
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+#define PLAT_ARM_SPMC_BASE U(0xDE000000)
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#define PLAT_ARM_SPMC_SIZE UL(0x02000000) /* 32 MB */
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