Complete Yocto mirror with license table for TQMa6UL (2038-compliance)
- 264 license table entries with exact download URLs (224/264 resolved) - Complete sources/ directory with all BitBake recipes - Build configuration: tqma6ul-multi-mba6ulx, spaetzle (musl) - Full traceability for Softwarefreigabeantrag - GCC 13.4.0, Linux 6.6.102, U-Boot 2023.04, musl 1.2.4 - License distribution: GPL-2.0 (24), MIT (23), GPL-2.0+ (18), BSD-3 (16)
This commit is contained in:
Siggi (OpenClaw Agent)
@@ -0,0 +1,4 @@
|
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Arm platforms BSPs
|
||||
==================
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This directory contains Arm platforms definitions and configuration for Linux.
|
||||
@@ -0,0 +1,17 @@
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# SPDX-License-Identifier: MIT
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#
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# ARM64
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#
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CONFIG_ARM64=y
|
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CONFIG_64BIT=y
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CONFIG_ARCH_VEXPRESS=y
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#
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# Bus support
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#
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CONFIG_ARM_AMBA=y
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||||
|
||||
#
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# Bus devices
|
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#
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||||
CONFIG_VEXPRESS_CONFIG=y
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||||
@@ -0,0 +1,5 @@
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||||
define KMACHINE corstone1000
|
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define KTYPE standard
|
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define KARCH arm64
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kconf hardware corstone1000/base.cfg
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@@ -0,0 +1,29 @@
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CONFIG_LOCALVERSION="-yocto-standard"
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_LOG_BUF_SHIFT=12
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
# CONFIG_NET_NS is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
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CONFIG_ARM64=y
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||||
CONFIG_THUMB2_KERNEL=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
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CONFIG_ZBOOT_ROM_BSS=0x0
|
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CONFIG_VFP=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
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CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
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CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_SERIO_SERPORT is not set
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_PL031=y
|
||||
CONFIG_MAILBOX=y
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
@@ -0,0 +1,8 @@
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# SPDX-License-Identifier: MIT
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CONFIG_SERIAL_AMBA_PL011=y
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||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
|
||||
CONFIG_ARM_SP805_WATCHDOG=y
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||||
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_PL031=y
|
||||
@@ -0,0 +1,11 @@
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define KMACHINE fvp
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define KTYPE standard
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define KARCH arm64
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include ktypes/standard/standard.scc
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include fvp.scc
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|
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# default policy for standard kernels
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#include features/latencytop/latencytop.scc
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#include features/profiling/profiling.scc
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@@ -0,0 +1,13 @@
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include features/input/input.scc
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include features/net/net.scc
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include cfg/timer/no_hz.scc
|
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include cfg/virtio.scc
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|
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kconf hardware fvp/fvp-board.cfg
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kconf hardware fvp/fvp-net.cfg
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kconf hardware fvp/fvp-rtc.cfg
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kconf hardware fvp/fvp-serial.cfg
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kconf hardware fvp/fvp-cfi.cfg
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kconf hardware fvp/fvp-drm.cfg
|
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kconf hardware fvp/fvp-timer.cfg
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kconf hardware fvp/fvp-watchdog.cfg
|
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@@ -0,0 +1,10 @@
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CONFIG_ARM64=y
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CONFIG_ARCH_VEXPRESS=y
|
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CONFIG_SMP=y
|
||||
CONFIG_NR_CPUS=8
|
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CONFIG_HOTPLUG_CPU=y
|
||||
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
|
||||
CONFIG_CPU_IDLE=y
|
||||
@@ -0,0 +1,3 @@
|
||||
# CFI Flash
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CONFIG_MTD=y
|
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CONFIG_MTD_CFI=y
|
||||
@@ -0,0 +1,5 @@
|
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# DRM CLCD
|
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CONFIG_DRM=y
|
||||
CONFIG_DRM_PL111=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ARMCLCD=y
|
||||
@@ -0,0 +1,3 @@
|
||||
CONFIG_NET_VENDOR_SMSC=y
|
||||
CONFIG_SMSC911X=y
|
||||
CONFIG_SMC91X=y
|
||||
@@ -0,0 +1,2 @@
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_PL031=y
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@@ -0,0 +1,2 @@
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
@@ -0,0 +1,4 @@
|
||||
# Dual timer module
|
||||
CONFIG_COMPILE_TEST=y
|
||||
CONFIG_ARM_TIMER_SP804=y
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CONFIG_CLK_SP810=y
|
||||
@@ -0,0 +1,3 @@
|
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# Watchdog
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CONFIG_WATCHDOG=y
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CONFIG_ARM_SP805_WATCHDOG=y
|
||||
@@ -0,0 +1,11 @@
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define KMACHINE juno
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define KTYPE standard
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define KARCH arm64
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include ktypes/standard/standard.scc
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|
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include juno.scc
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|
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# default policy for standard kernels
|
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#include features/latencytop/latencytop.scc
|
||||
#include features/profiling/profiling.scc
|
||||
@@ -0,0 +1,24 @@
|
||||
include features/input/input.scc
|
||||
include features/net/net.scc
|
||||
include features/usb/usb-base.scc
|
||||
include features/bluetooth/bluetooth.scc
|
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include cfg/timer/no_hz.scc
|
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include cfg/usb-mass-storage.scc
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kconf hardware juno/juno-board.cfg
|
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kconf hardware juno/juno-devfreq.cfg
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kconf hardware juno/juno-dma.cfg
|
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kconf hardware juno/juno-drm.cfg
|
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kconf hardware juno/juno-fb.cfg
|
||||
kconf hardware juno/juno-i2c.cfg
|
||||
# kconf hardware juno/juno-mali-midgard.cfg
|
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kconf hardware juno/juno-mmc.cfg
|
||||
kconf hardware juno/juno-net.cfg
|
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kconf hardware juno/juno-pci.cfg
|
||||
kconf hardware juno/juno-rtc.cfg
|
||||
kconf hardware juno/juno-sata.cfg
|
||||
kconf hardware juno/juno-serial.cfg
|
||||
kconf hardware juno/juno-sound.cfg
|
||||
kconf hardware juno/juno-thermal.cfg
|
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kconf hardware juno/juno-usb.cfg
|
||||
|
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@@ -0,0 +1,42 @@
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CONFIG_ARM64=y
|
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CONFIG_ARCH_VEXPRESS=y
|
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CONFIG_SMP=y
|
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CONFIG_NR_CPUS=8
|
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CONFIG_HOTPLUG_CPU=y
|
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|
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# Keyboard over AMBA
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CONFIG_SERIO=y
|
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CONFIG_SERIO_AMBAKMI=y
|
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|
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# Hardware mailbox
|
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CONFIG_MAILBOX=y
|
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CONFIG_ARM_MHU=y
|
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|
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# SCMI support
|
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CONFIG_HWMON=y
|
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CONFIG_ARM_SCMI_PROTOCOL=y
|
||||
CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y
|
||||
CONFIG_ARM_SCMI_POWER_DOMAIN=y
|
||||
CONFIG_SENSORS_ARM_SCMI=y
|
||||
CONFIG_COMMON_CLK_SCMI=y
|
||||
|
||||
# Power Interface and system control
|
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CONFIG_ARM_SCPI_PROTOCOL=y
|
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CONFIG_ARM_SCPI_POWER_DOMAIN=y
|
||||
CONFIG_SENSORS_ARM_SCPI=y
|
||||
CONFIG_COMMON_CLK_SCPI=y
|
||||
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
|
||||
CONFIG_CPU_IDLE=y
|
||||
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_ARM_SCPI_CPUFREQ=y
|
||||
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
|
||||
CONFIG_CONNECTOR=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
@@ -0,0 +1,4 @@
|
||||
CONFIG_PM_DEVFREQ=y
|
||||
CONFIG_DEVFREQ_THERMAL=y
|
||||
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
|
||||
CONFIG_DEVFREQ_GOV_PERFORMANCE=y
|
||||
@@ -0,0 +1,5 @@
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_PL330_DMA=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_CMA_SIZE_MBYTES=96
|
||||
@@ -0,0 +1,5 @@
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_HDLCD=y
|
||||
CONFIG_DRM_I2C_NXP_TDA998X=y
|
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CONFIG_FB=y
|
||||
CONFIG_FB_ARMCLCD=y
|
||||
@@ -0,0 +1,4 @@
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_ARMCLCD=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
@@ -0,0 +1,2 @@
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_DESIGNWARE_PLATFORM=y
|
||||
@@ -0,0 +1,7 @@
|
||||
CONFIG_MALI_MIDGARD=y
|
||||
CONFIG_MALI_EXPERT=y
|
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CONFIG_MALI_PLATFORM_FAKE=y
|
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CONFIG_MALI_PLATFORM_THIRDPARTY=y
|
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CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="juno_soc"
|
||||
CONFIG_MALI_PLATFORM_DEVICETREE=y
|
||||
CONFIG_MALI_DEVFREQ=y
|
||||
@@ -0,0 +1,2 @@
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
@@ -0,0 +1,3 @@
|
||||
CONFIG_NET_VENDOR_SMSC=y
|
||||
CONFIG_SMSC911X=y
|
||||
CONFIG_SMC91X=y
|
||||
@@ -0,0 +1,12 @@
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_IOV=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_REALLOC_ENABLE_AUTO=y
|
||||
CONFIG_PCI_PRI=y
|
||||
CONFIG_PCI_PASID=y
|
||||
CONFIG_PCI_HOST_GENERIC=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_HOTPLUG_PCI=y
|
||||
CONFIG_HOTPLUG_PCI_PCIE=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIE_ECRC=y
|
||||
@@ -0,0 +1,2 @@
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_PL031=y
|
||||
@@ -0,0 +1,2 @@
|
||||
CONFIG_ATA=y
|
||||
CONFIG_SATA_SIL24=y
|
||||
@@ -0,0 +1,2 @@
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
@@ -0,0 +1,14 @@
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_SEQUENCER=y
|
||||
CONFIG_SND_SEQ_DUMMY=y
|
||||
CONFIG_SND_OSSEMUL=y
|
||||
CONFIG_SND_MIXER_OSS=y
|
||||
CONFIG_SND_PCM_OSS=y
|
||||
CONFIG_SND_SEQUENCER_OSS=y
|
||||
# CONFIG_SND_USB is not set
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_DESIGNWARE_I2S=y
|
||||
CONFIG_SND_SOC_HDMI_CODEC=y
|
||||
CONFIG_SND_SOC_SPDIF=y
|
||||
CONFIG_SND_SIMPLE_CARD=y
|
||||
@@ -0,0 +1,8 @@
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_ENERGY_MODEL=y
|
||||
CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR=y
|
||||
CONFIG_THERMAL_GOV_USER_SPACE=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_THERMAL_WRITABLE_TRIPS=y
|
||||
@@ -0,0 +1,7 @@
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_ULPI=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_HCD_PLATFORM=y
|
||||
CONFIG_NOP_USB_XCEIV=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
@@ -0,0 +1,6 @@
|
||||
define KMACHINE n1sdp
|
||||
define KTYPE preempt-rt
|
||||
define KARCH arm64
|
||||
|
||||
include ktypes/preempt-rt/preempt-rt.scc
|
||||
include n1sdp/disable-kvm.cfg
|
||||
@@ -0,0 +1,5 @@
|
||||
define KMACHINE n1sdp
|
||||
define KTYPE standard
|
||||
define KARCH arm64
|
||||
|
||||
include ktypes/standard/standard.scc
|
||||
@@ -0,0 +1 @@
|
||||
# CONFIG_KVM is not set
|
||||
@@ -0,0 +1,4 @@
|
||||
CONFIG_NET_9P=y
|
||||
CONFIG_NET_9P_VIRTIO=y
|
||||
CONFIG_9P_FS=y
|
||||
CONFIG_9P_FS_POSIX_ACL=y
|
||||
@@ -0,0 +1 @@
|
||||
kconf non-hardware virtio-9p.cfg
|
||||
@@ -0,0 +1,488 @@
|
||||
From f9881d01669cd98e6f897214f407dce8a245bdfe Mon Sep 17 00:00:00 2001
|
||||
From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
Date: Mon, 19 Feb 2024 16:01:28 +0000
|
||||
Subject: [PATCH 1/6] remoteproc: Add Arm remoteproc driver
|
||||
|
||||
introduce remoteproc support for Arm remote processors
|
||||
|
||||
The supported remote processors are those that come with a reset
|
||||
control register and a reset status register. The driver allows to
|
||||
switch on or off the remote processor.
|
||||
|
||||
The current use case is Corstone-1000 External System (Cortex-M3).
|
||||
|
||||
The driver can be extended to support other remote processors
|
||||
controlled with a reset control and a reset status registers.
|
||||
|
||||
The driver also supports control of multiple remote processors at the
|
||||
same time.
|
||||
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
Upstream-Status: Submitted [cover letter: https://lore.kernel.org/all/20240301164227.339208-1-abdellatif.elkhlifi@arm.com/]
|
||||
---
|
||||
MAINTAINERS | 6 +
|
||||
drivers/remoteproc/Kconfig | 18 ++
|
||||
drivers/remoteproc/Makefile | 1 +
|
||||
drivers/remoteproc/arm_rproc.c | 395 +++++++++++++++++++++++++++++++++
|
||||
4 files changed, 420 insertions(+)
|
||||
create mode 100644 drivers/remoteproc/arm_rproc.c
|
||||
|
||||
diff --git a/MAINTAINERS b/MAINTAINERS
|
||||
index 8d1052fa6a69..54d6a40feea5 100644
|
||||
--- a/MAINTAINERS
|
||||
+++ b/MAINTAINERS
|
||||
@@ -1764,6 +1764,12 @@ S: Maintained
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/arm,vic.yaml
|
||||
F: drivers/irqchip/irq-vic.c
|
||||
|
||||
+ARM REMOTEPROC DRIVER
|
||||
+M: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
+L: linux-remoteproc@vger.kernel.org
|
||||
+S: Maintained
|
||||
+F: drivers/remoteproc/arm_rproc.c
|
||||
+
|
||||
ARM SMC WATCHDOG DRIVER
|
||||
M: Julius Werner <jwerner@chromium.org>
|
||||
R: Evan Benn <evanbenn@chromium.org>
|
||||
diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
|
||||
index 48845dc8fa85..57fbac454a5d 100644
|
||||
--- a/drivers/remoteproc/Kconfig
|
||||
+++ b/drivers/remoteproc/Kconfig
|
||||
@@ -365,6 +365,24 @@ config XLNX_R5_REMOTEPROC
|
||||
|
||||
It's safe to say N if not interested in using RPU r5f cores.
|
||||
|
||||
+config ARM_REMOTEPROC
|
||||
+ tristate "Arm remoteproc support"
|
||||
+ depends on HAS_IOMEM && ARM64
|
||||
+ default n
|
||||
+ help
|
||||
+ Say y here to support Arm remote processors via the remote
|
||||
+ processor framework.
|
||||
+
|
||||
+ The supported processors are those that come with a reset control register
|
||||
+ and a reset status register. The design can be extended to support different
|
||||
+ processors meeting these requirements.
|
||||
+ The driver also supports control of multiple remote cores at the same time.
|
||||
+
|
||||
+ Supported remote cores:
|
||||
+ Corstone-1000 External System (Cortex-M3)
|
||||
+
|
||||
+ It's safe to say N here.
|
||||
+
|
||||
endif # REMOTEPROC
|
||||
|
||||
endmenu
|
||||
diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
|
||||
index 91314a9b43ce..73126310835b 100644
|
||||
--- a/drivers/remoteproc/Makefile
|
||||
+++ b/drivers/remoteproc/Makefile
|
||||
@@ -39,3 +39,4 @@ obj-$(CONFIG_STM32_RPROC) += stm32_rproc.o
|
||||
obj-$(CONFIG_TI_K3_DSP_REMOTEPROC) += ti_k3_dsp_remoteproc.o
|
||||
obj-$(CONFIG_TI_K3_R5_REMOTEPROC) += ti_k3_r5_remoteproc.o
|
||||
obj-$(CONFIG_XLNX_R5_REMOTEPROC) += xlnx_r5_remoteproc.o
|
||||
+obj-$(CONFIG_ARM_REMOTEPROC) += arm_rproc.o
|
||||
diff --git a/drivers/remoteproc/arm_rproc.c b/drivers/remoteproc/arm_rproc.c
|
||||
new file mode 100644
|
||||
index 000000000000..6afa78ae7ad3
|
||||
--- /dev/null
|
||||
+++ b/drivers/remoteproc/arm_rproc.c
|
||||
@@ -0,0 +1,395 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-only
|
||||
+/*
|
||||
+ * Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
|
||||
+ *
|
||||
+ * Authors:
|
||||
+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/delay.h>
|
||||
+#include <linux/err.h>
|
||||
+#include <linux/firmware.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/remoteproc.h>
|
||||
+
|
||||
+#include "remoteproc_internal.h"
|
||||
+
|
||||
+/**
|
||||
+ * struct arm_rproc_reset_cfg - remote processor reset configuration
|
||||
+ * @ctrl_reg: address of the control register
|
||||
+ * @state_reg: address of the reset status register
|
||||
+ */
|
||||
+struct arm_rproc_reset_cfg {
|
||||
+ void __iomem *ctrl_reg;
|
||||
+ void __iomem *state_reg;
|
||||
+};
|
||||
+
|
||||
+struct arm_rproc;
|
||||
+
|
||||
+/**
|
||||
+ * struct arm_rproc_dcfg - Arm remote processor configuration
|
||||
+ * @stop: stop callback function
|
||||
+ * @start: start callback function
|
||||
+ */
|
||||
+struct arm_rproc_dcfg {
|
||||
+ int (*stop)(struct rproc *rproc);
|
||||
+ int (*start)(struct rproc *rproc);
|
||||
+};
|
||||
+
|
||||
+/**
|
||||
+ * struct arm_rproc - Arm remote processor instance
|
||||
+ * @rproc: rproc handler
|
||||
+ * @core_dcfg: device configuration pointer
|
||||
+ * @reset_cfg: reset configuration registers
|
||||
+ */
|
||||
+struct arm_rproc {
|
||||
+ struct rproc *rproc;
|
||||
+ const struct arm_rproc_dcfg *core_dcfg;
|
||||
+ struct arm_rproc_reset_cfg reset_cfg;
|
||||
+};
|
||||
+
|
||||
+/* Definitions for Arm Corstone-1000 External System */
|
||||
+
|
||||
+#define EXTSYS_RST_CTRL_CPUWAIT BIT(0)
|
||||
+#define EXTSYS_RST_CTRL_RST_REQ BIT(1)
|
||||
+
|
||||
+#define EXTSYS_RST_ACK_MASK GENMASK(2, 1)
|
||||
+#define EXTSYS_RST_ST_RST_ACK(x) \
|
||||
+ ((u8)(FIELD_GET(EXTSYS_RST_ACK_MASK, (x))))
|
||||
+
|
||||
+#define EXTSYS_RST_ACK_NO_RESET_REQ (0x0)
|
||||
+#define EXTSYS_RST_ACK_NOT_COMPLETE (0x1)
|
||||
+#define EXTSYS_RST_ACK_COMPLETE (0x2)
|
||||
+#define EXTSYS_RST_ACK_RESERVED (0x3)
|
||||
+
|
||||
+#define EXTSYS_RST_ACK_POLL_TRIES (3)
|
||||
+#define EXTSYS_RST_ACK_POLL_TIMEOUT (1000)
|
||||
+
|
||||
+/**
|
||||
+ * arm_rproc_start_cs1000_extsys() - custom start function
|
||||
+ * @rproc: pointer to the remote processor object
|
||||
+ *
|
||||
+ * Start function for Corstone-1000 External System.
|
||||
+ * Allow the External System core start execute instructions.
|
||||
+ *
|
||||
+ * Return:
|
||||
+ *
|
||||
+ * 0 on success. Otherwise, failure
|
||||
+ */
|
||||
+static int arm_rproc_start_cs1000_extsys(struct rproc *rproc)
|
||||
+{
|
||||
+ struct arm_rproc *priv = rproc->priv;
|
||||
+ u32 ctrl_reg;
|
||||
+
|
||||
+ /* CPUWAIT signal of the External System is de-asserted */
|
||||
+ ctrl_reg = readl(priv->reset_cfg.ctrl_reg);
|
||||
+ ctrl_reg &= ~EXTSYS_RST_CTRL_CPUWAIT;
|
||||
+ writel(ctrl_reg, priv->reset_cfg.ctrl_reg);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * arm_rproc_cs1000_extsys_poll_rst_ack() - poll RST_ACK bits
|
||||
+ * @rproc: pointer to the remote processor object
|
||||
+ * @exp_ack: expected bits value
|
||||
+ * @rst_ack: bits value read
|
||||
+ *
|
||||
+ * Tries to read RST_ACK bits until the timeout expires.
|
||||
+ * EXTSYS_RST_ACK_POLL_TRIES tries are made,
|
||||
+ * every EXTSYS_RST_ACK_POLL_TIMEOUT milliseconds.
|
||||
+ *
|
||||
+ * Return:
|
||||
+ *
|
||||
+ * 0 on success. Otherwise, failure
|
||||
+ */
|
||||
+static int arm_rproc_cs1000_extsys_poll_rst_ack(struct rproc *rproc,
|
||||
+ u8 exp_ack, u8 *rst_ack)
|
||||
+{
|
||||
+ struct arm_rproc *priv = rproc->priv;
|
||||
+ struct device *dev = rproc->dev.parent;
|
||||
+ u32 state_reg;
|
||||
+ int tries = EXTSYS_RST_ACK_POLL_TRIES;
|
||||
+ unsigned long timeout;
|
||||
+
|
||||
+ do {
|
||||
+ state_reg = readl(priv->reset_cfg.state_reg);
|
||||
+ *rst_ack = EXTSYS_RST_ST_RST_ACK(state_reg);
|
||||
+
|
||||
+ if (*rst_ack == EXTSYS_RST_ACK_RESERVED) {
|
||||
+ dev_err(dev, "unexpected RST_ACK value: 0x%x\n",
|
||||
+ *rst_ack);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ /* expected ACK value read */
|
||||
+ if ((*rst_ack & exp_ack) || (*rst_ack == exp_ack))
|
||||
+ return 0;
|
||||
+
|
||||
+ timeout = msleep_interruptible(EXTSYS_RST_ACK_POLL_TIMEOUT);
|
||||
+
|
||||
+ if (timeout) {
|
||||
+ dev_err(dev, "polling RST_ACK aborted\n");
|
||||
+ return -ECONNABORTED;
|
||||
+ }
|
||||
+ } while (--tries);
|
||||
+
|
||||
+ dev_err(dev, "polling RST_ACK timed out\n");
|
||||
+
|
||||
+ return -ETIMEDOUT;
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * arm_rproc_stop_cs1000_extsys() - custom stop function
|
||||
+ * @rproc: pointer to the remote processor object
|
||||
+ *
|
||||
+ * Reset all logic within the External System, the core will be in a halt state.
|
||||
+ *
|
||||
+ * Return:
|
||||
+ *
|
||||
+ * 0 on success. Otherwise, failure
|
||||
+ */
|
||||
+static int arm_rproc_stop_cs1000_extsys(struct rproc *rproc)
|
||||
+{
|
||||
+ struct arm_rproc *priv = rproc->priv;
|
||||
+ struct device *dev = rproc->dev.parent;
|
||||
+ u32 ctrl_reg;
|
||||
+ u8 rst_ack, req_status;
|
||||
+ int ret;
|
||||
+
|
||||
+ ctrl_reg = readl(priv->reset_cfg.ctrl_reg);
|
||||
+ ctrl_reg |= EXTSYS_RST_CTRL_RST_REQ;
|
||||
+ writel(ctrl_reg, priv->reset_cfg.ctrl_reg);
|
||||
+
|
||||
+ ret = arm_rproc_cs1000_extsys_poll_rst_ack(rproc,
|
||||
+ EXTSYS_RST_ACK_COMPLETE |
|
||||
+ EXTSYS_RST_ACK_NOT_COMPLETE,
|
||||
+ &rst_ack);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ req_status = rst_ack;
|
||||
+
|
||||
+ ctrl_reg = readl(priv->reset_cfg.ctrl_reg);
|
||||
+ ctrl_reg &= ~EXTSYS_RST_CTRL_RST_REQ;
|
||||
+ writel(ctrl_reg, priv->reset_cfg.ctrl_reg);
|
||||
+
|
||||
+ ret = arm_rproc_cs1000_extsys_poll_rst_ack(rproc, 0, &rst_ack);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ if (req_status == EXTSYS_RST_ACK_COMPLETE) {
|
||||
+ dev_dbg(dev, "the requested reset has been accepted\n");
|
||||
+ return 0;
|
||||
+ }
|
||||
+
|
||||
+ dev_err(dev, "the requested reset has been denied\n");
|
||||
+ return -EACCES;
|
||||
+}
|
||||
+
|
||||
+static const struct arm_rproc_dcfg arm_rproc_cfg_corstone1000_extsys = {
|
||||
+ .stop = arm_rproc_stop_cs1000_extsys,
|
||||
+ .start = arm_rproc_start_cs1000_extsys,
|
||||
+};
|
||||
+
|
||||
+/**
|
||||
+ * arm_rproc_stop() - Stop function for rproc_ops
|
||||
+ * @rproc: pointer to the remote processor object
|
||||
+ *
|
||||
+ * Calls the stop() callback of the remote core
|
||||
+ *
|
||||
+ * Return:
|
||||
+ *
|
||||
+ * 0 on success. Otherwise, failure
|
||||
+ */
|
||||
+static int arm_rproc_stop(struct rproc *rproc)
|
||||
+{
|
||||
+ struct arm_rproc *priv = rproc->priv;
|
||||
+
|
||||
+ return priv->core_dcfg->stop(rproc);
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * arm_rproc_start() - Start function for rproc_ops
|
||||
+ * @rproc: pointer to the remote processor object
|
||||
+ *
|
||||
+ * Calls the start() callback of the remote core
|
||||
+ *
|
||||
+ * Return:
|
||||
+ *
|
||||
+ * 0 on success. Otherwise, failure
|
||||
+ */
|
||||
+static int arm_rproc_start(struct rproc *rproc)
|
||||
+{
|
||||
+ struct arm_rproc *priv = rproc->priv;
|
||||
+
|
||||
+ return priv->core_dcfg->start(rproc);
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * arm_rproc_parse_fw() - Parse firmware function for rproc_ops
|
||||
+ * @rproc: pointer to the remote processor object
|
||||
+ * @fw: pointer to the firmware
|
||||
+ *
|
||||
+ * Does nothing currently.
|
||||
+ *
|
||||
+ * Return:
|
||||
+ *
|
||||
+ * 0 for success.
|
||||
+ */
|
||||
+static int arm_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * arm_rproc_load() - Load firmware to memory function for rproc_ops
|
||||
+ * @rproc: pointer to the remote processor object
|
||||
+ * @fw: pointer to the firmware
|
||||
+ *
|
||||
+ * Does nothing currently.
|
||||
+ *
|
||||
+ * Return:
|
||||
+ *
|
||||
+ * 0 for success.
|
||||
+ */
|
||||
+static int arm_rproc_load(struct rproc *rproc, const struct firmware *fw)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct rproc_ops arm_rproc_ops = {
|
||||
+ .start = arm_rproc_start,
|
||||
+ .stop = arm_rproc_stop,
|
||||
+ .load = arm_rproc_load,
|
||||
+ .parse_fw = arm_rproc_parse_fw,
|
||||
+};
|
||||
+
|
||||
+/**
|
||||
+ * arm_rproc_probe() - the platform device probe
|
||||
+ * @pdev: the platform device
|
||||
+ *
|
||||
+ * Read from the device tree the properties needed to setup
|
||||
+ * the reset and comms for the remote processor.
|
||||
+ * Also, allocate a rproc device and register it with the remoteproc subsystem.
|
||||
+ *
|
||||
+ * Return:
|
||||
+ *
|
||||
+ * 0 on success. Otherwise, failure
|
||||
+ */
|
||||
+static int arm_rproc_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ const struct arm_rproc_dcfg *core_dcfg;
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ struct device_node *np = dev->of_node;
|
||||
+ struct arm_rproc *priv;
|
||||
+ struct rproc *rproc;
|
||||
+ const char *fw_name;
|
||||
+ int ret;
|
||||
+ struct resource *res;
|
||||
+
|
||||
+ core_dcfg = of_device_get_match_data(dev);
|
||||
+ if (!core_dcfg)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ ret = rproc_of_parse_firmware(dev, 0, &fw_name);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev,
|
||||
+ "can't parse firmware-name from device tree (%pe)\n",
|
||||
+ ERR_PTR(ret));
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ dev_dbg(dev, "firmware-name: %s\n", fw_name);
|
||||
+
|
||||
+ rproc = rproc_alloc(dev, np->name, &arm_rproc_ops, fw_name,
|
||||
+ sizeof(*priv));
|
||||
+ if (!rproc)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ priv = rproc->priv;
|
||||
+ priv->rproc = rproc;
|
||||
+ priv->core_dcfg = core_dcfg;
|
||||
+
|
||||
+ res = platform_get_resource_byname(pdev,
|
||||
+ IORESOURCE_MEM, "reset-control");
|
||||
+ priv->reset_cfg.ctrl_reg = devm_ioremap_resource(&pdev->dev, res);
|
||||
+ if (IS_ERR(priv->reset_cfg.ctrl_reg)) {
|
||||
+ ret = PTR_ERR(priv->reset_cfg.ctrl_reg);
|
||||
+ dev_err(dev,
|
||||
+ "can't map the reset-control register (%pe)\n",
|
||||
+ ERR_PTR((unsigned long)priv->reset_cfg.ctrl_reg));
|
||||
+ goto err_free_rproc;
|
||||
+ } else {
|
||||
+ dev_dbg(dev, "reset-control: %p\n", priv->reset_cfg.ctrl_reg);
|
||||
+ }
|
||||
+
|
||||
+ res = platform_get_resource_byname(pdev,
|
||||
+ IORESOURCE_MEM, "reset-status");
|
||||
+ priv->reset_cfg.state_reg = devm_ioremap_resource(&pdev->dev, res);
|
||||
+ if (IS_ERR(priv->reset_cfg.state_reg)) {
|
||||
+ ret = PTR_ERR(priv->reset_cfg.state_reg);
|
||||
+ dev_err(dev,
|
||||
+ "can't map the reset-status register (%pe)\n",
|
||||
+ ERR_PTR((unsigned long)priv->reset_cfg.state_reg));
|
||||
+ goto err_free_rproc;
|
||||
+ } else {
|
||||
+ dev_dbg(dev, "reset-status: %p\n",
|
||||
+ priv->reset_cfg.state_reg);
|
||||
+ }
|
||||
+
|
||||
+ platform_set_drvdata(pdev, rproc);
|
||||
+
|
||||
+ ret = rproc_add(rproc);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev, "can't add remote processor (%pe)\n",
|
||||
+ ERR_PTR(ret));
|
||||
+ goto err_free_rproc;
|
||||
+ } else {
|
||||
+ dev_dbg(dev, "remote processor added\n");
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+
|
||||
+err_free_rproc:
|
||||
+ rproc_free(rproc);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
+ * arm_rproc_remove() - the platform device remove
|
||||
+ * @pdev: the platform device
|
||||
+ *
|
||||
+ * Delete and free the resources used.
|
||||
+ */
|
||||
+static void arm_rproc_remove(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct rproc *rproc = platform_get_drvdata(pdev);
|
||||
+
|
||||
+ rproc_del(rproc);
|
||||
+ rproc_free(rproc);
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id arm_rproc_of_match[] = {
|
||||
+ { .compatible = "arm,corstone1000-extsys", .data = &arm_rproc_cfg_corstone1000_extsys },
|
||||
+ {},
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, arm_rproc_of_match);
|
||||
+
|
||||
+static struct platform_driver arm_rproc_driver = {
|
||||
+ .probe = arm_rproc_probe,
|
||||
+ .remove_new = arm_rproc_remove,
|
||||
+ .driver = {
|
||||
+ .name = "arm-rproc",
|
||||
+ .of_match_table = arm_rproc_of_match,
|
||||
+ },
|
||||
+};
|
||||
+module_platform_driver(arm_rproc_driver);
|
||||
+
|
||||
+MODULE_LICENSE("GPL");
|
||||
+MODULE_DESCRIPTION("Arm Remote Processor Control Driver");
|
||||
+MODULE_AUTHOR("Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>");
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@@ -0,0 +1,42 @@
|
||||
From 0122f194e4a6fb50750dadd08f2354e78d4dd79c Mon Sep 17 00:00:00 2001
|
||||
From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
Date: Mon, 19 Feb 2024 16:18:37 +0000
|
||||
Subject: [PATCH 2/6] arm64: dts: Add corstone1000 external system device node
|
||||
|
||||
add device tree node for the external system core in Corstone-1000
|
||||
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
Upstream-Status: Submitted [cover letter: https://lore.kernel.org/all/20240301164227.339208-1-abdellatif.elkhlifi@arm.com/]
|
||||
---
|
||||
arch/arm64/boot/dts/arm/corstone1000.dtsi | 10 +++++++++-
|
||||
1 file changed, 9 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi
|
||||
index 6ad7829f9e28..67df642363e9 100644
|
||||
--- a/arch/arm64/boot/dts/arm/corstone1000.dtsi
|
||||
+++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0 OR MIT
|
||||
/*
|
||||
- * Copyright (c) 2022, Arm Limited. All rights reserved.
|
||||
+ * Copyright 2022, 2024, Arm Limited and/or its affiliates <open-source-office@arm.com>
|
||||
* Copyright (c) 2022, Linaro Limited. All rights reserved.
|
||||
*
|
||||
*/
|
||||
@@ -157,5 +157,13 @@ mhu_seh1: mailbox@1b830000 {
|
||||
secure-status = "okay"; /* secure-world-only */
|
||||
status = "disabled";
|
||||
};
|
||||
+
|
||||
+ extsys0: remoteproc@1a010310 {
|
||||
+ compatible = "arm,corstone1000-extsys";
|
||||
+ reg = <0x1a010310 0x4>,
|
||||
+ <0x1a010314 0X4>;
|
||||
+ reg-names = "reset-control", "reset-status";
|
||||
+ firmware-name = "es_flashfw.elf";
|
||||
+ };
|
||||
};
|
||||
};
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@@ -0,0 +1,105 @@
|
||||
From af50eca3e3b408f2f1f378c1d0c48fb6c3107c8c Mon Sep 17 00:00:00 2001
|
||||
From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
Date: Mon, 19 Feb 2024 20:47:26 +0000
|
||||
Subject: [PATCH 3/6] dt-bindings: remoteproc: Add Arm remoteproc
|
||||
|
||||
introduce the bindings for Arm remoteproc support.
|
||||
|
||||
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
Upstream-Status: Submitted [cover letter: https://lore.kernel.org/all/20240301164227.339208-1-abdellatif.elkhlifi@arm.com/]
|
||||
---
|
||||
.../bindings/remoteproc/arm,rproc.yaml | 69 +++++++++++++++++++
|
||||
MAINTAINERS | 1 +
|
||||
2 files changed, 70 insertions(+)
|
||||
create mode 100644 Documentation/devicetree/bindings/remoteproc/arm,rproc.yaml
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/remoteproc/arm,rproc.yaml b/Documentation/devicetree/bindings/remoteproc/arm,rproc.yaml
|
||||
new file mode 100644
|
||||
index 000000000000..322197158059
|
||||
--- /dev/null
|
||||
+++ b/Documentation/devicetree/bindings/remoteproc/arm,rproc.yaml
|
||||
@@ -0,0 +1,69 @@
|
||||
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
+%YAML 1.2
|
||||
+---
|
||||
+$id: http://devicetree.org/schemas/remoteproc/arm,rproc.yaml#
|
||||
+$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
+
|
||||
+title: Arm Remoteproc Devices
|
||||
+
|
||||
+maintainers:
|
||||
+ - Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
+
|
||||
+description: |
|
||||
+ Some Arm heterogeneous System-On-Chips feature remote processors that can
|
||||
+ be controlled with a reset control register and a reset status register to
|
||||
+ start or stop the processor.
|
||||
+
|
||||
+ This document defines the bindings for these remote processors.
|
||||
+
|
||||
+properties:
|
||||
+ compatible:
|
||||
+ enum:
|
||||
+ - arm,corstone1000-extsys
|
||||
+
|
||||
+ reg:
|
||||
+ minItems: 2
|
||||
+ maxItems: 2
|
||||
+ description: |
|
||||
+ Address and size in bytes of the reset control register
|
||||
+ and the reset status register.
|
||||
+ Expects the registers to be in the order as above.
|
||||
+ Should contain an entry for each value in 'reg-names'.
|
||||
+
|
||||
+ reg-names:
|
||||
+ description: |
|
||||
+ Required names for each of the reset registers defined in
|
||||
+ the 'reg' property. Expects the names from the following
|
||||
+ list, in the specified order, each representing the corresponding
|
||||
+ reset register.
|
||||
+ items:
|
||||
+ - const: reset-control
|
||||
+ - const: reset-status
|
||||
+
|
||||
+ firmware-name:
|
||||
+ description: |
|
||||
+ Default name of the firmware to load to the remote processor.
|
||||
+
|
||||
+required:
|
||||
+ - compatible
|
||||
+ - reg
|
||||
+ - reg-names
|
||||
+ - firmware-name
|
||||
+
|
||||
+additionalProperties: false
|
||||
+
|
||||
+examples:
|
||||
+ - |
|
||||
+ extsys0: remoteproc@1a010310 {
|
||||
+ compatible = "arm,corstone1000-extsys";
|
||||
+ reg = <0x1a010310 0x4>, <0x1a010314 0x4>;
|
||||
+ reg-names = "reset-control", "reset-status";
|
||||
+ firmware-name = "es0_flashfw.elf";
|
||||
+ };
|
||||
+
|
||||
+ extsys1: remoteproc@1a010318 {
|
||||
+ compatible = "arm,corstone1000-extsys";
|
||||
+ reg = <0x1a010318 0x4>, <0x1a01031c 0x4>;
|
||||
+ reg-names = "reset-control", "reset-status";
|
||||
+ firmware-name = "es1_flashfw.elf";
|
||||
+ };
|
||||
diff --git a/MAINTAINERS b/MAINTAINERS
|
||||
index 54d6a40feea5..eddaa3841a65 100644
|
||||
--- a/MAINTAINERS
|
||||
+++ b/MAINTAINERS
|
||||
@@ -1768,6 +1768,7 @@ ARM REMOTEPROC DRIVER
|
||||
M: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
L: linux-remoteproc@vger.kernel.org
|
||||
S: Maintained
|
||||
+F: Documentation/devicetree/bindings/remoteproc/arm,rproc.yaml
|
||||
F: drivers/remoteproc/arm_rproc.c
|
||||
|
||||
ARM SMC WATCHDOG DRIVER
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@@ -0,0 +1,3 @@
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_DEBUG_INFO_DWARF4=y
|
||||
@@ -0,0 +1,124 @@
|
||||
CONFIG_LOCALVERSION="-yocto-standard"
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_LOG_BUF_SHIFT=13
|
||||
CONFIG_LOG_CPU_MAX_BUF_SHIFT=13
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_BOOT_CONFIG=y
|
||||
CONFIG_ARCH_VEXPRESS=y
|
||||
CONFIG_CMDLINE="console=ttyAMA0 loglevel=9"
|
||||
# CONFIG_SUSPEND is not set
|
||||
# CONFIG_STACKPROTECTOR is not set
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_NET_SCHED=y
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_EFI_BOOTLOADER_CONTROL=y
|
||||
CONFIG_EFI_CAPSULE_LOADER=y
|
||||
CONFIG_EFI_TEST=y
|
||||
CONFIG_RESET_ATTACK_MITIGATION=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
# CONFIG_NET_VENDOR_AMD is not set
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
# CONFIG_NET_VENDOR_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_CAVIUM is not set
|
||||
# CONFIG_NET_VENDOR_CORTINA is not set
|
||||
# CONFIG_NET_VENDOR_EZCHIP is not set
|
||||
# CONFIG_NET_VENDOR_GOOGLE is not set
|
||||
# CONFIG_NET_VENDOR_HISILICON is not set
|
||||
# CONFIG_NET_VENDOR_HUAWEI is not set
|
||||
# CONFIG_NET_VENDOR_INTEL is not set
|
||||
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
# CONFIG_NET_VENDOR_MICREL is not set
|
||||
# CONFIG_NET_VENDOR_MICROCHIP is not set
|
||||
# CONFIG_NET_VENDOR_MICROSEMI is not set
|
||||
# CONFIG_NET_VENDOR_NI is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_NETRONOME is not set
|
||||
# CONFIG_NET_VENDOR_PENSANDO is not set
|
||||
# CONFIG_NET_VENDOR_QUALCOMM is not set
|
||||
# CONFIG_NET_VENDOR_RENESAS is not set
|
||||
# CONFIG_NET_VENDOR_ROCKER is not set
|
||||
# CONFIG_NET_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
CONFIG_SMC91X=y
|
||||
CONFIG_SMSC911X=y
|
||||
# CONFIG_NET_VENDOR_SOCIONEXT is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
# CONFIG_NET_VENDOR_XILINX is not set
|
||||
# CONFIG_SERIO_SERPORT is not set
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_UAS=y
|
||||
CONFIG_USB_ISP1760=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_PL031=y
|
||||
CONFIG_TEE=y
|
||||
CONFIG_OPTEE=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CONFIGFS_FS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_CODEPAGE_860=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_NLS_ISO8859_15=y
|
||||
CONFIG_NLS_UTF8=y
|
||||
CONFIG_LIBCRC32C=y
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_PANIC_TIMEOUT=5
|
||||
CONFIG_REGULATOR=y
|
||||
# CONFIG_REGULATOR_DEBUG is not set
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
|
||||
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
|
||||
# CONFIG_REGULATOR_GPIO is not set
|
||||
# CONFIG_REGULATOR_VCTRL is not set
|
||||
# CONFIG_REGULATOR_VEXPRESS is not set
|
||||
CONFIG_MMC=y
|
||||
# CONFIG_PWRSEQ_EMMC is not set
|
||||
CONFIG_PWRSEQ_SIMPLE=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_BLOCK_MINORS=8
|
||||
# CONFIG_SDIO_UART is not set
|
||||
# CONFIG_MMC_TEST is not set
|
||||
# CONFIG_MMC_DEBUG is not set
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
# CONFIG_MMC_STM32_SDMMC is not set
|
||||
# CONFIG_MMC_SDHCI is not set
|
||||
# CONFIG_MMC_DW is not set
|
||||
# CONFIG_MMC_VUB300 is not set
|
||||
# CONFIG_MMC_USHC is not set
|
||||
# CONFIG_MMC_USDHI6ROL0 is not set
|
||||
# CONFIG_MMC_CQHCI is not set
|
||||
# CONFIG_MMC_HSQ is not set
|
||||
# CONFIG_MMC_MTK is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_EXT4_FS_POSIX_ACL is not set
|
||||
# CONFIG_EXT4_FS_SECURITY is not set
|
||||
# CONFIG_EXT4_DEBUG is not set
|
||||
@@ -0,0 +1,2 @@
|
||||
CONFIG_REMOTEPROC=y
|
||||
CONFIG_ARM_REMOTEPROC=y
|
||||
@@ -0,0 +1,29 @@
|
||||
From b443c8efd563dc372c60e7ad9f52aeddf7c13706 Mon Sep 17 00:00:00 2001
|
||||
From: Anton Antonov <Anton.Antonov@arm.com>
|
||||
Date: Mon, 7 Nov 2022 11:37:51 +0000
|
||||
Subject: [PATCH] arm64: dts: fvp: Enable virtio-rng support
|
||||
|
||||
The virtio-rng is available from FVP_Base_RevC-2xAEMvA version 11.17.
|
||||
Enable it since Yocto includes a recipe for a newer FVP version.
|
||||
|
||||
Upstream-Status: Inappropriate [Yocto specific]
|
||||
Signed-off-by: Anton Antonov <Anton.Antonov@arm.com>
|
||||
---
|
||||
arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 1 -
|
||||
1 file changed, 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
|
||||
index ec2d5280a30b..acafdcbf1063 100644
|
||||
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
|
||||
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
|
||||
@@ -26,7 +26,6 @@ virtio@200000 {
|
||||
compatible = "virtio,mmio";
|
||||
reg = <0x200000 0x200>;
|
||||
interrupts = <46>;
|
||||
- status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@@ -0,0 +1 @@
|
||||
CONFIG_MTD_NAND_FSL_IFC=n
|
||||
@@ -0,0 +1,134 @@
|
||||
# Kernel configuration and dts specific information
|
||||
|
||||
#
|
||||
# Kernel configurations and dts (If not using Linux provided ones) are captured
|
||||
# in this file. Update SRC_URI and do_patch for building images with custom dts
|
||||
#
|
||||
|
||||
# We can't set FILESEXTRAPATHS once because of how the kernel classes search for
|
||||
# config fragments. Discussion is ongoing as to whether this is the correct
|
||||
# solution, or a workaround.
|
||||
# https://bugzilla.yoctoproject.org/show_bug.cgi?id=14154
|
||||
ARMBSPFILESPATHS := "${THISDIR}:${THISDIR}/files:"
|
||||
|
||||
# Arm platforms kmeta
|
||||
SRC_URI_KMETA = "file://arm-platforms-kmeta;type=kmeta;name=arm-platforms-kmeta;destsuffix=arm-platforms-kmeta"
|
||||
SRC_URI:append:fvp-base = " ${SRC_URI_KMETA}"
|
||||
SRC_URI:append:juno = " ${SRC_URI_KMETA}"
|
||||
SRC_URI:append:n1sdp = " ${SRC_URI_KMETA}"
|
||||
|
||||
#
|
||||
# Corstone1000 KMACHINE
|
||||
#
|
||||
FILESEXTRAPATHS:prepend:corstone1000 := "${ARMBSPFILESPATHS}"
|
||||
COMPATIBLE_MACHINE:corstone1000 = "${MACHINE}"
|
||||
KCONFIG_MODE:corstone1000 = "--alldefconfig"
|
||||
KMACHINE:corstone1000 = "corstone1000"
|
||||
LINUX_KERNEL_TYPE:corstone1000 = "standard"
|
||||
#disabling the rootfs cpio file compression so it is not compressed twice when bundled with the kernel
|
||||
KERNEL_EXTRA_ARGS:corstone1000 += "CONFIG_INITRAMFS_COMPRESSION_NONE=y"
|
||||
SRC_URI:append:corstone1000 = " \
|
||||
file://defconfig \
|
||||
"
|
||||
|
||||
SRC_URI:append:corstone1000 = " ${@bb.utils.contains('MACHINE_FEATURES', \
|
||||
'corstone1000_kernel_debug', \
|
||||
'file://corstone1000_kernel_debug.cfg', \
|
||||
'', \
|
||||
d)}"
|
||||
SRC_URI:append:corstone1000 = " \
|
||||
${@bb.utils.contains( \
|
||||
'MACHINE_FEATURES', \
|
||||
'corstone1000-extsys', \
|
||||
' \
|
||||
file://extsys.cfg \
|
||||
file://0001-remoteproc-Add-Arm-remoteproc-driver.patch \
|
||||
file://0002-arm64-dts-Add-corstone1000-external-system-device-no.patch \
|
||||
file://0003-dt-bindings-remoteproc-Add-Arm-remoteproc.patch \
|
||||
', \
|
||||
'', \
|
||||
d \
|
||||
) \
|
||||
} \
|
||||
"
|
||||
|
||||
# Default kernel features not needed for corstone1000
|
||||
# otherwise the extra kernel modules will increase the rootfs size
|
||||
# corstone1000 has limited flash memory constraints
|
||||
KERNEL_EXTRA_FEATURES:corstone1000 = ""
|
||||
KERNEL_FEATURES:corstone1000 = ""
|
||||
|
||||
#
|
||||
# FVP BASE KMACHINE
|
||||
#
|
||||
COMPATIBLE_MACHINE:fvp-base = "fvp-base"
|
||||
KMACHINE:fvp-base = "fvp"
|
||||
FILESEXTRAPATHS:prepend:fvp-base := "${ARMBSPFILESPATHS}:${ARMFILESPATHS}"
|
||||
SRC_URI:append:fvp-base = " \
|
||||
file://0001-arm64-dts-fvp-Enable-virtio-rng-support.patch \
|
||||
file://tee.cfg \
|
||||
${@bb.utils.contains('MACHINE_FEATURES', 'ts-smm-gateway', \
|
||||
'file://no-strict-devmem.cfg', '' , d)} \
|
||||
"
|
||||
|
||||
|
||||
#
|
||||
# Juno KMACHINE
|
||||
#
|
||||
COMPATIBLE_MACHINE:juno = "juno"
|
||||
FILESEXTRAPATHS:prepend:juno := "${ARMBSPFILESPATHS}"
|
||||
SRC_URI:append:juno = " \
|
||||
file://no-fsl-ifc-nand.cfg \
|
||||
"
|
||||
|
||||
#
|
||||
# Musca B1/S2 can't run Linux
|
||||
#
|
||||
COMPATIBLE_MACHINE:musca-b1 = "(^$)"
|
||||
COMPATIBLE_MACHINE:musca-s1 = "(^$)"
|
||||
|
||||
#
|
||||
# N1SDP KMACHINE
|
||||
#
|
||||
FILESEXTRAPATHS:prepend:n1sdp := "${THISDIR}/linux-yocto-6.6/n1sdp:"
|
||||
COMPATIBLE_MACHINE:n1sdp = "n1sdp"
|
||||
KBUILD_DEFCONFIG:n1sdp = "defconfig"
|
||||
KCONFIG_MODE:n1sdp = "--alldefconfig"
|
||||
FILESEXTRAPATHS:prepend:n1sdp := "${ARMBSPFILESPATHS}"
|
||||
SRC_URI:append:n1sdp = " \
|
||||
file://0001-iommu-arm-smmu-v3-workaround-for-ATC_INV_SIZE_ALL-in.patch \
|
||||
file://0002-n1sdp-pci_quirk-add-acs-override-for-PCI-devices.patch \
|
||||
file://0003-pcie-Add-quirk-for-the-Arm-Neoverse-N1SDP-platform.patch \
|
||||
file://0004-n1sdp-pcie-add-quirk-support-enabling-remote-chip-PC.patch \
|
||||
file://0005-arm64-kpti-Whitelist-early-Arm-Neoverse-N1-revisions.patch \
|
||||
file://0006-arm64-defconfig-disable-config-options-that-does-not.patch \
|
||||
file://enable-nvme.cfg \
|
||||
file://enable-realtek-R8169.cfg \
|
||||
file://enable-usb_conn_gpio.cfg \
|
||||
file://usb_xhci_pci_renesas.cfg \
|
||||
file://no-fsl-ifc-nand.cfg \
|
||||
"
|
||||
# Since we use the intree defconfig and the preempt-rt turns off some configs
|
||||
# do_kernel_configcheck will display warnings. So, lets disable it.
|
||||
KCONF_AUDIT_LEVEL:n1sdp:pn-linux-yocto-rt = "0"
|
||||
|
||||
#
|
||||
# SGI575 KMACHINE
|
||||
#
|
||||
COMPATIBLE_MACHINE:sgi575 = "sgi575"
|
||||
KBUILD_DEFCONFIG:sgi575 = "defconfig"
|
||||
KCONFIG_MODE:sgi575 = "--alldefconfig"
|
||||
|
||||
#
|
||||
# Total Compute (TC0/TC1) KMACHINE
|
||||
#
|
||||
COMPATIBLE_MACHINE:tc = "(tc0|tc1)"
|
||||
KBUILD_DEFCONFIG:tc = "defconfig"
|
||||
KCONFIG_MODE:tc = "--alldefconfig"
|
||||
|
||||
#
|
||||
# sbsa-ref KMACHINE
|
||||
#
|
||||
COMPATIBLE_MACHINE:sbsa-ref = "sbsa-ref"
|
||||
KBUILD_DEFCONFIG:sbsa-ref = "defconfig"
|
||||
KCONFIG_MODE:sbsa-ref = "--alldefconfig"
|
||||
@@ -0,0 +1,47 @@
|
||||
From 32ae4539865e64bcfb0c6955bdac8db5904e493d Mon Sep 17 00:00:00 2001
|
||||
From: Manoj Kumar <manoj.kumar3@arm.com>
|
||||
Date: Mon, 1 Feb 2021 21:36:43 +0530
|
||||
Subject: [PATCH] iommu/arm-smmu-v3: workaround for ATC_INV_SIZE_ALL in N1SDP
|
||||
|
||||
ATC_INV_SIZE_ALL request should automatically translate to ATS
|
||||
address which is not happening in SMMUv3 version gone into
|
||||
N1SDP platform. This workaround manually sets the ATS address
|
||||
field to proper value for ATC_INV_SIZE_ALL command.
|
||||
|
||||
Change-Id: If89465be94720a62be85e1e6612f17e93fa9b8a5
|
||||
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
|
||||
Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@arm.com>
|
||||
|
||||
Upstream-Status: Inappropriate [Workaround]
|
||||
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Signed-off-by: Adam Johnston <adam.johnston@arm.com>
|
||||
---
|
||||
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 1 +
|
||||
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 +
|
||||
2 files changed, 2 insertions(+)
|
||||
|
||||
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
|
||||
index d4d8bfee9feb..0524bf2ec021 100644
|
||||
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
|
||||
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
|
||||
@@ -1738,6 +1738,7 @@ arm_smmu_atc_inv_to_cmd(int ssid, unsigned long iova, size_t size,
|
||||
};
|
||||
|
||||
if (!size) {
|
||||
+ cmd->atc.addr = ATC_INV_ADDR_ALL;
|
||||
cmd->atc.size = ATC_INV_SIZE_ALL;
|
||||
return;
|
||||
}
|
||||
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
|
||||
index cd48590ada30..20892b2bfe1d 100644
|
||||
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
|
||||
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
|
||||
@@ -472,6 +472,7 @@ struct arm_smmu_cmdq_ent {
|
||||
|
||||
#define CMDQ_OP_ATC_INV 0x40
|
||||
#define ATC_INV_SIZE_ALL 52
|
||||
+ #define ATC_INV_ADDR_ALL 0x7FFFFFFFFFFFF000UL
|
||||
struct {
|
||||
u32 sid;
|
||||
u32 ssid;
|
||||
@@ -0,0 +1,159 @@
|
||||
From fc8605e74b51d9e0ab8efd0489eca2e11d807f07 Mon Sep 17 00:00:00 2001
|
||||
From: Manoj Kumar <manoj.kumar3@arm.com>
|
||||
Date: Tue, 31 Aug 2021 16:15:38 +0000
|
||||
Subject: [PATCH] n1sdp: pci_quirk: add acs override for PCI devices
|
||||
|
||||
Patch taken from:
|
||||
https://gitlab.com/Queuecumber/linux-acs-override/raw/master/workspaces/5.4/acso.patch
|
||||
|
||||
Change-Id: Ib926bf50524ce9990fbaa2f2f8670fe84bd571f9
|
||||
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
|
||||
|
||||
Upstream-Status: Inappropriate [will not be submitted as its a workaround to address hardware issue]
|
||||
Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@arm.com>
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Signed-off-by: Adam Johnston <adam.johnston@arm.com>
|
||||
---
|
||||
.../admin-guide/kernel-parameters.txt | 8 ++
|
||||
drivers/pci/quirks.c | 102 ++++++++++++++++++
|
||||
2 files changed, 110 insertions(+)
|
||||
|
||||
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
|
||||
index 963cdaecabcb..8e94af513b9f 100644
|
||||
--- a/Documentation/admin-guide/kernel-parameters.txt
|
||||
+++ b/Documentation/admin-guide/kernel-parameters.txt
|
||||
@@ -4162,6 +4162,14 @@
|
||||
nomsi [MSI] If the PCI_MSI kernel config parameter is
|
||||
enabled, this kernel boot option can be used to
|
||||
disable the use of MSI interrupts system-wide.
|
||||
+ pcie_acs_override [PCIE] Override missing PCIe ACS support for
|
||||
+ downstream
|
||||
+ All downstream ports - full ACS capabilities
|
||||
+ multfunction
|
||||
+ All multifunction devices - multifunction ACS subset
|
||||
+ id:nnnn:nnnn
|
||||
+ Specfic device - full ACS capabilities
|
||||
+ Specified as vid:did (vendor/device ID) in hex
|
||||
noioapicquirk [APIC] Disable all boot interrupt quirks.
|
||||
Safety option to keep boot IRQs enabled. This
|
||||
should never be necessary.
|
||||
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
|
||||
index 285acc4aaccc..d6ebef1f30db 100644
|
||||
--- a/drivers/pci/quirks.c
|
||||
+++ b/drivers/pci/quirks.c
|
||||
@@ -3612,6 +3612,107 @@ static void quirk_no_bus_reset(struct pci_dev *dev)
|
||||
dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET;
|
||||
}
|
||||
|
||||
+static bool acs_on_downstream;
|
||||
+static bool acs_on_multifunction;
|
||||
+
|
||||
+#define NUM_ACS_IDS 16
|
||||
+struct acs_on_id {
|
||||
+ unsigned short vendor;
|
||||
+ unsigned short device;
|
||||
+};
|
||||
+static struct acs_on_id acs_on_ids[NUM_ACS_IDS];
|
||||
+static u8 max_acs_id;
|
||||
+
|
||||
+static __init int pcie_acs_override_setup(char *p)
|
||||
+{
|
||||
+ if (!p)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ while (*p) {
|
||||
+ if (!strncmp(p, "downstream", 10))
|
||||
+ acs_on_downstream = true;
|
||||
+ if (!strncmp(p, "multifunction", 13))
|
||||
+ acs_on_multifunction = true;
|
||||
+ if (!strncmp(p, "id:", 3)) {
|
||||
+ char opt[5];
|
||||
+ int ret;
|
||||
+ long val;
|
||||
+
|
||||
+ if (max_acs_id >= NUM_ACS_IDS - 1) {
|
||||
+ pr_warn("Out of PCIe ACS override slots (%d)\n",
|
||||
+ NUM_ACS_IDS);
|
||||
+ goto next;
|
||||
+ }
|
||||
+
|
||||
+ p += 3;
|
||||
+ snprintf(opt, 5, "%s", p);
|
||||
+ ret = kstrtol(opt, 16, &val);
|
||||
+ if (ret) {
|
||||
+ pr_warn("PCIe ACS ID parse error %d\n", ret);
|
||||
+ goto next;
|
||||
+ }
|
||||
+ acs_on_ids[max_acs_id].vendor = val;
|
||||
+
|
||||
+ p += strcspn(p, ":");
|
||||
+ if (*p != ':') {
|
||||
+ pr_warn("PCIe ACS invalid ID\n");
|
||||
+ goto next;
|
||||
+ }
|
||||
+
|
||||
+ p++;
|
||||
+ snprintf(opt, 5, "%s", p);
|
||||
+ ret = kstrtol(opt, 16, &val);
|
||||
+ if (ret) {
|
||||
+ pr_warn("PCIe ACS ID parse error %d\n", ret);
|
||||
+ goto next;
|
||||
+ }
|
||||
+ acs_on_ids[max_acs_id].device = val;
|
||||
+ max_acs_id++;
|
||||
+ }
|
||||
+next:
|
||||
+ p += strcspn(p, ",");
|
||||
+ if (*p == ',')
|
||||
+ p++;
|
||||
+ }
|
||||
+
|
||||
+ if (acs_on_downstream || acs_on_multifunction || max_acs_id)
|
||||
+ pr_warn("Warning: PCIe ACS overrides enabled; This may allow non-IOMMU protected peer-to-peer DMA\n");
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+early_param("pcie_acs_override", pcie_acs_override_setup);
|
||||
+
|
||||
+static int pcie_acs_overrides(struct pci_dev *dev, u16 acs_flags)
|
||||
+{
|
||||
+ int i;
|
||||
+
|
||||
+ /* Never override ACS for legacy devices or devices with ACS caps */
|
||||
+ if (!pci_is_pcie(dev) ||
|
||||
+ pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS))
|
||||
+ return -ENOTTY;
|
||||
+
|
||||
+ for (i = 0; i < max_acs_id; i++)
|
||||
+ if (acs_on_ids[i].vendor == dev->vendor &&
|
||||
+ acs_on_ids[i].device == dev->device)
|
||||
+ return 1;
|
||||
+
|
||||
+ switch (pci_pcie_type(dev)) {
|
||||
+ case PCI_EXP_TYPE_DOWNSTREAM:
|
||||
+ case PCI_EXP_TYPE_ROOT_PORT:
|
||||
+ if (acs_on_downstream)
|
||||
+ return 1;
|
||||
+ break;
|
||||
+ case PCI_EXP_TYPE_ENDPOINT:
|
||||
+ case PCI_EXP_TYPE_UPSTREAM:
|
||||
+ case PCI_EXP_TYPE_LEG_END:
|
||||
+ case PCI_EXP_TYPE_RC_END:
|
||||
+ if (acs_on_multifunction && dev->multifunction)
|
||||
+ return 1;
|
||||
+ }
|
||||
+
|
||||
+ return -ENOTTY;
|
||||
+}
|
||||
+
|
||||
/*
|
||||
* Some NVIDIA GPU devices do not work with bus reset, SBR needs to be
|
||||
* prevented for those affected devices.
|
||||
@@ -4980,6 +5081,7 @@ static const struct pci_dev_acs_enabled {
|
||||
{ PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs },
|
||||
/* Wangxun nics */
|
||||
{ PCI_VENDOR_ID_WANGXUN, PCI_ANY_ID, pci_quirk_wangxun_nic_acs },
|
||||
+ { PCI_ANY_ID, PCI_ANY_ID, pcie_acs_overrides },
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
@@ -0,0 +1,324 @@
|
||||
From 5aa5769af625c79589fd84b8afc06149c2362218 Mon Sep 17 00:00:00 2001
|
||||
From: Deepak Pandey <Deepak.Pandey@arm.com>
|
||||
Date: Fri, 31 May 2019 16:42:43 +0100
|
||||
Subject: [PATCH] pcie: Add quirk for the Arm Neoverse N1SDP platform
|
||||
|
||||
The Arm N1SDP SoC suffers from some PCIe integration issues, most
|
||||
prominently config space accesses to not existing BDFs being answered
|
||||
with a bus abort, resulting in an SError.
|
||||
To mitigate this, the firmware scans the bus before boot (catching the
|
||||
SErrors) and creates a table with valid BDFs, which acts as a filter for
|
||||
Linux' config space accesses.
|
||||
|
||||
Add code consulting the table as an ACPI PCIe quirk, also register the
|
||||
corresponding device tree based description of the host controller.
|
||||
Also fix the other two minor issues on the way, namely not being fully
|
||||
ECAM compliant and config space accesses being restricted to 32-bit
|
||||
accesses only.
|
||||
|
||||
This allows the Arm Neoverse N1SDP board to boot Linux without crashing
|
||||
and to access *any* devices (there are no platform devices except UART).
|
||||
|
||||
Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
|
||||
[Sudipto: extend to cover the CCIX root port as well]
|
||||
Signed-off-by: Sudipto Paul <sudipto.paul@arm.com>
|
||||
[Andre: fix coding style issues, rewrite some parts, add DT support]
|
||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
|
||||
Change-Id: I1d3a4b9bf6b3b883d262e3c4ff1f88a0eb81c1fe
|
||||
Upstream-Status: Inappropriate [will not be submitted as its a workaround to address hardware issue]
|
||||
Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Signed-off-by: Adam Johnston <adam.johnston@arm.com>
|
||||
---
|
||||
arch/arm64/configs/defconfig | 1 +
|
||||
drivers/acpi/pci_mcfg.c | 7 +
|
||||
drivers/pci/controller/Kconfig | 11 ++
|
||||
drivers/pci/controller/Makefile | 2 +-
|
||||
drivers/pci/controller/pcie-n1sdp.c | 198 ++++++++++++++++++++++++++++
|
||||
include/linux/pci-ecam.h | 2 +
|
||||
6 files changed, 220 insertions(+), 1 deletion(-)
|
||||
create mode 100644 drivers/pci/controller/pcie-n1sdp.c
|
||||
|
||||
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
|
||||
index bbbc31391a65..973aa3b4d407 100644
|
||||
--- a/arch/arm64/configs/defconfig
|
||||
+++ b/arch/arm64/configs/defconfig
|
||||
@@ -214,6 +214,7 @@ CONFIG_NFC_S3FWRN5_I2C=m
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIEAER=y
|
||||
+CONFIG_PCI_QUIRKS=y
|
||||
CONFIG_PCI_IOV=y
|
||||
CONFIG_PCI_PASID=y
|
||||
CONFIG_HOTPLUG_PCI=y
|
||||
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
|
||||
index 860014b89b8e..2d4c1c699ffe 100644
|
||||
--- a/drivers/acpi/pci_mcfg.c
|
||||
+++ b/drivers/acpi/pci_mcfg.c
|
||||
@@ -171,6 +171,13 @@ static struct mcfg_fixup mcfg_quirks[] = {
|
||||
ALTRA_ECAM_QUIRK(1, 13),
|
||||
ALTRA_ECAM_QUIRK(1, 14),
|
||||
ALTRA_ECAM_QUIRK(1, 15),
|
||||
+
|
||||
+#define N1SDP_ECAM_MCFG(rev, seg, ops) \
|
||||
+ {"ARMLTD", "ARMN1SDP", rev, seg, MCFG_BUS_ANY, ops }
|
||||
+
|
||||
+ /* N1SDP SoC with v1 PCIe controller */
|
||||
+ N1SDP_ECAM_MCFG(0x20181101, 0, &pci_n1sdp_pcie_ecam_ops),
|
||||
+ N1SDP_ECAM_MCFG(0x20181101, 1, &pci_n1sdp_ccix_ecam_ops),
|
||||
#endif /* ARM64 */
|
||||
|
||||
#ifdef CONFIG_LOONGARCH
|
||||
diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig
|
||||
index bfd9bac37e24..7a65799dded7 100644
|
||||
--- a/drivers/pci/controller/Kconfig
|
||||
+++ b/drivers/pci/controller/Kconfig
|
||||
@@ -50,6 +50,17 @@ config PCI_IXP4XX
|
||||
Say Y here if you want support for the PCI host controller found
|
||||
in the Intel IXP4xx XScale-based network processor SoC.
|
||||
|
||||
+config PCIE_HOST_N1SDP_ECAM
|
||||
+ bool "ARM N1SDP PCIe Controller"
|
||||
+ depends on ARM64
|
||||
+ depends on OF || (ACPI && PCI_QUIRKS)
|
||||
+ select PCI_HOST_COMMON
|
||||
+ default y if ARCH_VEXPRESS
|
||||
+ help
|
||||
+ Say Y here if you want PCIe support for the Arm N1SDP platform.
|
||||
+ The controller is ECAM compliant, but needs a quirk to workaround
|
||||
+ an integration issue.
|
||||
+
|
||||
config PCI_TEGRA
|
||||
bool "NVIDIA Tegra PCIe controller"
|
||||
depends on ARCH_TEGRA || COMPILE_TEST
|
||||
diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makefile
|
||||
index 37c8663de7fe..08e5afcf6e86 100644
|
||||
--- a/drivers/pci/controller/Makefile
|
||||
+++ b/drivers/pci/controller/Makefile
|
||||
@@ -39,7 +39,7 @@ obj-$(CONFIG_PCI_LOONGSON) += pci-loongson.o
|
||||
obj-$(CONFIG_PCIE_HISI_ERR) += pcie-hisi-error.o
|
||||
obj-$(CONFIG_PCIE_APPLE) += pcie-apple.o
|
||||
obj-$(CONFIG_PCIE_MT7621) += pcie-mt7621.o
|
||||
-
|
||||
+obj-$(CONFIG_PCIE_HOST_N1SDP_ECAM) += pcie-n1sdp.o
|
||||
# pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW
|
||||
obj-y += dwc/
|
||||
obj-y += mobiveil/
|
||||
diff --git a/drivers/pci/controller/pcie-n1sdp.c b/drivers/pci/controller/pcie-n1sdp.c
|
||||
new file mode 100644
|
||||
index 000000000000..408699b9dcb1
|
||||
--- /dev/null
|
||||
+++ b/drivers/pci/controller/pcie-n1sdp.c
|
||||
@@ -0,0 +1,198 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright (C) 2018/2019 ARM Ltd.
|
||||
+ *
|
||||
+ * This quirk is to mask the following issues:
|
||||
+ * - PCIE SLVERR: config space accesses to invalid PCIe BDFs cause a bus
|
||||
+ * error (signalled as an asynchronous SError)
|
||||
+ * - MCFG BDF mapping: the root complex is mapped separately from the device
|
||||
+ * config space
|
||||
+ * - Non 32-bit accesses to config space are not supported.
|
||||
+ *
|
||||
+ * At boot time the SCP board firmware creates a discovery table with
|
||||
+ * the root complex' base address and the valid BDF values, discovered while
|
||||
+ * scanning the config space and catching the SErrors.
|
||||
+ * Linux responds only to the EPs listed in this table, returning NULL
|
||||
+ * for the rest.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/init.h>
|
||||
+#include <linux/ioport.h>
|
||||
+#include <linux/sizes.h>
|
||||
+#include <linux/of_pci.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/pci-ecam.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/module.h>
|
||||
+
|
||||
+#include "../pci.h"
|
||||
+
|
||||
+/* Platform specific values as hardcoded in the firmware. */
|
||||
+#define AP_NS_SHARED_MEM_BASE 0x06000000
|
||||
+#define MAX_SEGMENTS 2 /* Two PCIe root complexes. */
|
||||
+#define BDF_TABLE_SIZE SZ_16K
|
||||
+
|
||||
+/*
|
||||
+ * Shared memory layout as written by the SCP upon boot time:
|
||||
+ * ----
|
||||
+ * Discover data header --> RC base address
|
||||
+ * \-> BDF Count
|
||||
+ * Discover data --> BDF 0...n
|
||||
+ * ----
|
||||
+ */
|
||||
+struct pcie_discovery_data {
|
||||
+ u32 rc_base_addr;
|
||||
+ u32 nr_bdfs;
|
||||
+ u32 valid_bdfs[0];
|
||||
+} *pcie_discovery_data[MAX_SEGMENTS];
|
||||
+
|
||||
+void __iomem *rc_remapped_addr[MAX_SEGMENTS];
|
||||
+
|
||||
+/*
|
||||
+ * map_bus() is called before we do a config space access for a certain
|
||||
+ * device. We use this to check whether this device is valid, avoiding
|
||||
+ * config space accesses which would result in an SError otherwise.
|
||||
+ */
|
||||
+static void __iomem *pci_n1sdp_map_bus(struct pci_bus *bus, unsigned int devfn,
|
||||
+ int where)
|
||||
+{
|
||||
+ struct pci_config_window *cfg = bus->sysdata;
|
||||
+ unsigned int devfn_shift = cfg->ops->bus_shift - 8;
|
||||
+ unsigned int busn = bus->number;
|
||||
+ unsigned int segment = bus->domain_nr;
|
||||
+ unsigned int bdf_addr;
|
||||
+ unsigned int table_count, i;
|
||||
+ struct pci_dev *dev;
|
||||
+
|
||||
+ if (segment >= MAX_SEGMENTS ||
|
||||
+ busn < cfg->busr.start || busn > cfg->busr.end)
|
||||
+ return NULL;
|
||||
+
|
||||
+ /* The PCIe root complex has a separate config space mapping. */
|
||||
+ if (busn == 0 && devfn == 0)
|
||||
+ return rc_remapped_addr[segment] + where;
|
||||
+
|
||||
+ dev = pci_get_domain_bus_and_slot(segment, busn, devfn);
|
||||
+ if (dev && dev->is_virtfn)
|
||||
+ return pci_ecam_map_bus(bus, devfn, where);
|
||||
+
|
||||
+ /* Accesses beyond the vendor ID always go to existing devices. */
|
||||
+ if (where > 0)
|
||||
+ return pci_ecam_map_bus(bus, devfn, where);
|
||||
+
|
||||
+ busn -= cfg->busr.start;
|
||||
+ bdf_addr = (busn << cfg->ops->bus_shift) + (devfn << devfn_shift);
|
||||
+ table_count = pcie_discovery_data[segment]->nr_bdfs;
|
||||
+ for (i = 0; i < table_count; i++) {
|
||||
+ if (bdf_addr == pcie_discovery_data[segment]->valid_bdfs[i])
|
||||
+ return pci_ecam_map_bus(bus, devfn, where);
|
||||
+ }
|
||||
+
|
||||
+ return NULL;
|
||||
+}
|
||||
+
|
||||
+static int pci_n1sdp_init(struct pci_config_window *cfg, unsigned int segment)
|
||||
+{
|
||||
+ phys_addr_t table_base;
|
||||
+ struct device *dev = cfg->parent;
|
||||
+ struct pcie_discovery_data *shared_data;
|
||||
+ size_t bdfs_size;
|
||||
+
|
||||
+ if (segment >= MAX_SEGMENTS)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ table_base = AP_NS_SHARED_MEM_BASE + segment * BDF_TABLE_SIZE;
|
||||
+
|
||||
+ if (!request_mem_region(table_base, BDF_TABLE_SIZE,
|
||||
+ "PCIe valid BDFs")) {
|
||||
+ dev_err(dev, "PCIe BDF shared region request failed\n");
|
||||
+ return -ENOMEM;
|
||||
+ }
|
||||
+
|
||||
+ shared_data = devm_ioremap(dev,
|
||||
+ table_base, BDF_TABLE_SIZE);
|
||||
+ if (!shared_data)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ /* Copy the valid BDFs structure to allocated normal memory. */
|
||||
+ bdfs_size = sizeof(struct pcie_discovery_data) +
|
||||
+ sizeof(u32) * shared_data->nr_bdfs;
|
||||
+ pcie_discovery_data[segment] = devm_kmalloc(dev, bdfs_size, GFP_KERNEL);
|
||||
+ if (!pcie_discovery_data[segment])
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ memcpy_fromio(pcie_discovery_data[segment], shared_data, bdfs_size);
|
||||
+
|
||||
+ rc_remapped_addr[segment] = devm_ioremap(dev,
|
||||
+ shared_data->rc_base_addr,
|
||||
+ PCI_CFG_SPACE_EXP_SIZE);
|
||||
+ if (!rc_remapped_addr[segment]) {
|
||||
+ dev_err(dev, "Cannot remap root port base\n");
|
||||
+ return -ENOMEM;
|
||||
+ }
|
||||
+
|
||||
+ devm_iounmap(dev, shared_data);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+/* Called for ACPI segment 0, and for all segments when using DT. */
|
||||
+static int pci_n1sdp_pcie_init(struct pci_config_window *cfg)
|
||||
+{
|
||||
+ struct platform_device *pdev = to_platform_device(cfg->parent);
|
||||
+ int segment = 0;
|
||||
+
|
||||
+ if (pdev->dev.of_node)
|
||||
+ segment = of_get_pci_domain_nr(pdev->dev.of_node);
|
||||
+ if (segment < 0 || segment > MAX_SEGMENTS) {
|
||||
+ dev_err(&pdev->dev, "N1SDP PCI controllers require linux,pci-domain property\n");
|
||||
+ dev_err(&pdev->dev, "Or invalid segment number, must be smaller than %d\n",
|
||||
+ MAX_SEGMENTS);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ return pci_n1sdp_init(cfg, segment);
|
||||
+}
|
||||
+
|
||||
+/* Called for ACPI segment 1. */
|
||||
+static int pci_n1sdp_ccix_init(struct pci_config_window *cfg)
|
||||
+{
|
||||
+ return pci_n1sdp_init(cfg, 1);
|
||||
+}
|
||||
+
|
||||
+const struct pci_ecam_ops pci_n1sdp_pcie_ecam_ops = {
|
||||
+ .bus_shift = 20,
|
||||
+ .init = pci_n1sdp_pcie_init,
|
||||
+ .pci_ops = {
|
||||
+ .map_bus = pci_n1sdp_map_bus,
|
||||
+ .read = pci_generic_config_read32,
|
||||
+ .write = pci_generic_config_write32,
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
+const struct pci_ecam_ops pci_n1sdp_ccix_ecam_ops = {
|
||||
+ .bus_shift = 20,
|
||||
+ .init = pci_n1sdp_ccix_init,
|
||||
+ .pci_ops = {
|
||||
+ .map_bus = pci_n1sdp_map_bus,
|
||||
+ .read = pci_generic_config_read32,
|
||||
+ .write = pci_generic_config_write32,
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
+static const struct of_device_id n1sdp_pcie_of_match[] = {
|
||||
+ { .compatible = "arm,n1sdp-pcie", .data = &pci_n1sdp_pcie_ecam_ops },
|
||||
+ { },
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, n1sdp_pcie_of_match);
|
||||
+
|
||||
+static struct platform_driver n1sdp_pcie_driver = {
|
||||
+ .driver = {
|
||||
+ .name = KBUILD_MODNAME,
|
||||
+ .of_match_table = n1sdp_pcie_of_match,
|
||||
+ .suppress_bind_attrs = true,
|
||||
+ },
|
||||
+ .probe = pci_host_common_probe,
|
||||
+};
|
||||
+builtin_platform_driver(n1sdp_pcie_driver);
|
||||
diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
|
||||
index 6b1301e2498e..b3cf3adeab28 100644
|
||||
--- a/include/linux/pci-ecam.h
|
||||
+++ b/include/linux/pci-ecam.h
|
||||
@@ -88,6 +88,8 @@ extern const struct pci_ecam_ops xgene_v2_pcie_ecam_ops; /* APM X-Gene PCIe v2.x
|
||||
extern const struct pci_ecam_ops al_pcie_ops; /* Amazon Annapurna Labs PCIe */
|
||||
extern const struct pci_ecam_ops tegra194_pcie_ops; /* Tegra194 PCIe */
|
||||
extern const struct pci_ecam_ops loongson_pci_ecam_ops; /* Loongson PCIe */
|
||||
+extern const struct pci_ecam_ops pci_n1sdp_pcie_ecam_ops; /* Arm N1SDP PCIe */
|
||||
+extern const struct pci_ecam_ops pci_n1sdp_ccix_ecam_ops; /* Arm N1SDP PCIe */
|
||||
#endif
|
||||
|
||||
#if IS_ENABLED(CONFIG_PCI_HOST_COMMON)
|
||||
@@ -0,0 +1,136 @@
|
||||
From b59e0d6c6035db80fc9044df0333f96ede53ad7a Mon Sep 17 00:00:00 2001
|
||||
From: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
|
||||
Date: Wed, 9 Feb 2022 20:37:43 +0530
|
||||
Subject: [PATCH] n1sdp: pcie: add quirk support enabling remote chip PCIe
|
||||
|
||||
Base address mapping for remote chip Root PCIe ECAM space.
|
||||
|
||||
When two N1SDP boards are coupled via the CCIX connection, the PCI host
|
||||
complex of the remote board appears as PCIe segment 2 on the primary board.
|
||||
The resources of the secondary board, including the host complex, are
|
||||
mapped at offset 0x40000000000 into the address space of the primary
|
||||
board, so take that into account when accessing the remote PCIe segment.
|
||||
|
||||
Change-Id: I0e8d1eb119aef6444b9df854a39b24441c12195a
|
||||
Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
|
||||
Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@arm.com>
|
||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
Signed-off-by: sahil <sahil@arm.com>
|
||||
|
||||
Upstream-Status: Inappropriate [will not be submitted as its an hack required to fix the hardware issue]
|
||||
Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Signed-off-by: Adam Johnston <adam.johnston@arm.com>
|
||||
---
|
||||
drivers/acpi/pci_mcfg.c | 1 +
|
||||
drivers/pci/controller/pcie-n1sdp.c | 32 +++++++++++++++++++++++++----
|
||||
include/linux/pci-ecam.h | 1 +
|
||||
3 files changed, 30 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
|
||||
index 2d4c1c699ffe..27f1e9a45c17 100644
|
||||
--- a/drivers/acpi/pci_mcfg.c
|
||||
+++ b/drivers/acpi/pci_mcfg.c
|
||||
@@ -178,6 +178,7 @@ static struct mcfg_fixup mcfg_quirks[] = {
|
||||
/* N1SDP SoC with v1 PCIe controller */
|
||||
N1SDP_ECAM_MCFG(0x20181101, 0, &pci_n1sdp_pcie_ecam_ops),
|
||||
N1SDP_ECAM_MCFG(0x20181101, 1, &pci_n1sdp_ccix_ecam_ops),
|
||||
+ N1SDP_ECAM_MCFG(0x20181101, 2, &pci_n1sdp_remote_pcie_ecam_ops),
|
||||
#endif /* ARM64 */
|
||||
|
||||
#ifdef CONFIG_LOONGARCH
|
||||
diff --git a/drivers/pci/controller/pcie-n1sdp.c b/drivers/pci/controller/pcie-n1sdp.c
|
||||
index 408699b9dcb1..b3b02417fd7d 100644
|
||||
--- a/drivers/pci/controller/pcie-n1sdp.c
|
||||
+++ b/drivers/pci/controller/pcie-n1sdp.c
|
||||
@@ -30,8 +30,10 @@
|
||||
|
||||
/* Platform specific values as hardcoded in the firmware. */
|
||||
#define AP_NS_SHARED_MEM_BASE 0x06000000
|
||||
-#define MAX_SEGMENTS 2 /* Two PCIe root complexes. */
|
||||
+/* Two PCIe root complexes in One Chip + One PCIe RC in Remote Chip */
|
||||
+#define MAX_SEGMENTS 3
|
||||
#define BDF_TABLE_SIZE SZ_16K
|
||||
+#define REMOTE_CHIP_ADDR_OFFSET 0x40000000000
|
||||
|
||||
/*
|
||||
* Shared memory layout as written by the SCP upon boot time:
|
||||
@@ -97,12 +99,17 @@ static int pci_n1sdp_init(struct pci_config_window *cfg, unsigned int segment)
|
||||
phys_addr_t table_base;
|
||||
struct device *dev = cfg->parent;
|
||||
struct pcie_discovery_data *shared_data;
|
||||
- size_t bdfs_size;
|
||||
+ size_t bdfs_size, rc_base_addr = 0;
|
||||
|
||||
if (segment >= MAX_SEGMENTS)
|
||||
return -ENODEV;
|
||||
|
||||
- table_base = AP_NS_SHARED_MEM_BASE + segment * BDF_TABLE_SIZE;
|
||||
+ if (segment > 1) {
|
||||
+ rc_base_addr = REMOTE_CHIP_ADDR_OFFSET;
|
||||
+ table_base = AP_NS_SHARED_MEM_BASE + REMOTE_CHIP_ADDR_OFFSET;
|
||||
+ } else {
|
||||
+ table_base = AP_NS_SHARED_MEM_BASE + segment * BDF_TABLE_SIZE;
|
||||
+ }
|
||||
|
||||
if (!request_mem_region(table_base, BDF_TABLE_SIZE,
|
||||
"PCIe valid BDFs")) {
|
||||
@@ -114,6 +121,7 @@ static int pci_n1sdp_init(struct pci_config_window *cfg, unsigned int segment)
|
||||
table_base, BDF_TABLE_SIZE);
|
||||
if (!shared_data)
|
||||
return -ENOMEM;
|
||||
+ rc_base_addr += shared_data->rc_base_addr;
|
||||
|
||||
/* Copy the valid BDFs structure to allocated normal memory. */
|
||||
bdfs_size = sizeof(struct pcie_discovery_data) +
|
||||
@@ -125,7 +133,7 @@ static int pci_n1sdp_init(struct pci_config_window *cfg, unsigned int segment)
|
||||
memcpy_fromio(pcie_discovery_data[segment], shared_data, bdfs_size);
|
||||
|
||||
rc_remapped_addr[segment] = devm_ioremap(dev,
|
||||
- shared_data->rc_base_addr,
|
||||
+ rc_base_addr,
|
||||
PCI_CFG_SPACE_EXP_SIZE);
|
||||
if (!rc_remapped_addr[segment]) {
|
||||
dev_err(dev, "Cannot remap root port base\n");
|
||||
@@ -161,6 +169,12 @@ static int pci_n1sdp_ccix_init(struct pci_config_window *cfg)
|
||||
return pci_n1sdp_init(cfg, 1);
|
||||
}
|
||||
|
||||
+/* Called for ACPI segment 2. */
|
||||
+static int pci_n1sdp_remote_pcie_init(struct pci_config_window *cfg)
|
||||
+{
|
||||
+ return pci_n1sdp_init(cfg, 2);
|
||||
+}
|
||||
+
|
||||
const struct pci_ecam_ops pci_n1sdp_pcie_ecam_ops = {
|
||||
.bus_shift = 20,
|
||||
.init = pci_n1sdp_pcie_init,
|
||||
@@ -181,6 +195,16 @@ const struct pci_ecam_ops pci_n1sdp_ccix_ecam_ops = {
|
||||
}
|
||||
};
|
||||
|
||||
+const struct pci_ecam_ops pci_n1sdp_remote_pcie_ecam_ops = {
|
||||
+ .bus_shift = 20,
|
||||
+ .init = pci_n1sdp_remote_pcie_init,
|
||||
+ .pci_ops = {
|
||||
+ .map_bus = pci_n1sdp_map_bus,
|
||||
+ .read = pci_generic_config_read32,
|
||||
+ .write = pci_generic_config_write32,
|
||||
+ }
|
||||
+};
|
||||
+
|
||||
static const struct of_device_id n1sdp_pcie_of_match[] = {
|
||||
{ .compatible = "arm,n1sdp-pcie", .data = &pci_n1sdp_pcie_ecam_ops },
|
||||
{ },
|
||||
diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
|
||||
index b3cf3adeab28..d4316795c00d 100644
|
||||
--- a/include/linux/pci-ecam.h
|
||||
+++ b/include/linux/pci-ecam.h
|
||||
@@ -90,6 +90,7 @@ extern const struct pci_ecam_ops tegra194_pcie_ops; /* Tegra194 PCIe */
|
||||
extern const struct pci_ecam_ops loongson_pci_ecam_ops; /* Loongson PCIe */
|
||||
extern const struct pci_ecam_ops pci_n1sdp_pcie_ecam_ops; /* Arm N1SDP PCIe */
|
||||
extern const struct pci_ecam_ops pci_n1sdp_ccix_ecam_ops; /* Arm N1SDP PCIe */
|
||||
+extern const struct pci_ecam_ops pci_n1sdp_remote_pcie_ecam_ops; /* Arm N1SDP PCIe */
|
||||
#endif
|
||||
|
||||
#if IS_ENABLED(CONFIG_PCI_HOST_COMMON)
|
||||
@@ -0,0 +1,33 @@
|
||||
From ff02f77788f8c01e9d675912c063e89415804b7d Mon Sep 17 00:00:00 2001
|
||||
From: Andre Przywara <andre.przywara@arm.com>
|
||||
Date: Fri, 17 May 2019 17:39:27 +0100
|
||||
Subject: [PATCH] arm64: kpti: Whitelist early Arm Neoverse N1 revisions
|
||||
|
||||
Early revisions (r1p0) of the Neoverse N1 core did not feature the
|
||||
CSV3 field in ID_AA64PFR0_EL1 to advertise they are not affected by
|
||||
the Spectre variant 3 (aka Meltdown) vulnerability.
|
||||
|
||||
Add this particular revision to the whitelist to avoid enabling KPTI.
|
||||
|
||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
Change-Id: I78df055a3e674aefd195d41cc6dc4ee08b0af099
|
||||
Upstream-Status: Inappropriate
|
||||
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Signed-off-by: Adam Johnston <adam.johnston@arm.com>
|
||||
---
|
||||
arch/arm64/kernel/cpufeature.c | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
|
||||
index b3f37e2209ad..b74210f38cd8 100644
|
||||
--- a/arch/arm64/kernel/cpufeature.c
|
||||
+++ b/arch/arm64/kernel/cpufeature.c
|
||||
@@ -1646,6 +1646,7 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
|
||||
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_SILVER),
|
||||
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
|
||||
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
|
||||
+ MIDR_REV(MIDR_NEOVERSE_N1, 1, 0), /* missing CSV3 */
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
char const *str = "kpti command line option";
|
||||
@@ -0,0 +1,57 @@
|
||||
From afdd5ae3eeb44381f906b6227422373d4af2811d Mon Sep 17 00:00:00 2001
|
||||
From: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Date: Wed, 21 Sep 2022 15:54:14 +0100
|
||||
Subject: [PATCH] arm64: defconfig: disable config options that does not apply
|
||||
anymore
|
||||
|
||||
Following config options should be not set to be more accurate and
|
||||
works with build system like yocto
|
||||
CONFIG_BT_HCIBTUSB
|
||||
CONFIG_BT_HCIBTUSB_MTK
|
||||
CONFIG_BT_HCIUART_MRVL
|
||||
CONFIG_BT_MRVL
|
||||
CONFIG_BT_MRVL_SDIO
|
||||
CONFIG_BT_QCOMSMD
|
||||
CONFIG_BT_NXPUART
|
||||
|
||||
Upstream-Status: Pending [not submitted upstream yet]
|
||||
Signed-off-by: Adam Johnston <adam.johnston@arm.com>
|
||||
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
|
||||
Signed-off-by: Anusmita Dutta Mazumder <anusmita.duttamazumder@arm.com>
|
||||
---
|
||||
arch/arm64/configs/defconfig | 14 +++++++-------
|
||||
1 file changed, 7 insertions(+), 7 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
|
||||
index d2b5208eb55d..b3028113de25 100644
|
||||
--- a/arch/arm64/configs/defconfig
|
||||
+++ b/arch/arm64/configs/defconfig
|
||||
@@ -186,17 +186,17 @@ CONFIG_BT_HIDP=m
|
||||
# CONFIG_BT_LE is not set
|
||||
CONFIG_BT_LEDS=y
|
||||
# CONFIG_BT_DEBUGFS is not set
|
||||
-CONFIG_BT_HCIBTUSB=m
|
||||
-CONFIG_BT_HCIBTUSB_MTK=y
|
||||
+# CONFIG_BT_HCIBTUSB is not set
|
||||
+# CONFIG_BT_HCIBTUSB_MTK is not set
|
||||
CONFIG_BT_HCIUART=m
|
||||
CONFIG_BT_HCIUART_LL=y
|
||||
CONFIG_BT_HCIUART_BCM=y
|
||||
CONFIG_BT_HCIUART_QCA=y
|
||||
-CONFIG_BT_HCIUART_MRVL=y
|
||||
-CONFIG_BT_MRVL=m
|
||||
-CONFIG_BT_MRVL_SDIO=m
|
||||
-CONFIG_BT_QCOMSMD=m
|
||||
-CONFIG_BT_NXPUART=m
|
||||
+# CONFIG_BT_HCIUART_MRVL is not set
|
||||
+# CONFIG_BT_MRVL is not set
|
||||
+# CONFIG_BT_MRVL_SDIO is not set
|
||||
+# CONFIG_BT_QCOMSMD is not set
|
||||
+# CONFIG_BT_NXPUART is not set
|
||||
CONFIG_CFG80211=m
|
||||
CONFIG_MAC80211=m
|
||||
CONFIG_MAC80211_LEDS=y
|
||||
--
|
||||
2.38.1
|
||||
|
||||
@@ -0,0 +1,3 @@
|
||||
# Enable NVMe flash storage support
|
||||
CONFIG_NVME_CORE=y
|
||||
CONFIG_BLK_DEV_NVME=y
|
||||
@@ -0,0 +1,3 @@
|
||||
# Enable Realtek Gigabit Ethernet adapter
|
||||
CONFIG_REALTEK_PHY=y
|
||||
CONFIG_R8169=y
|
||||
@@ -0,0 +1,2 @@
|
||||
# PHY_TEGRA_XUSB sets this to y, but its set as m in defconfig
|
||||
CONFIG_USB_CONN_GPIO=y
|
||||
@@ -0,0 +1,2 @@
|
||||
# CONFIG_USB_XHCI_PCI is not set
|
||||
# CONFIG_USB_XHCI_PCI_RENESAS is not set
|
||||
@@ -0,0 +1,3 @@
|
||||
# Add support for Arm Platforms (boards or simulators)
|
||||
|
||||
require linux-arm-platforms.inc
|
||||
@@ -0,0 +1,3 @@
|
||||
# Add support for Arm Platforms (boards or simulators)
|
||||
|
||||
require linux-arm-platforms.inc
|
||||
@@ -0,0 +1,3 @@
|
||||
# Add support for Arm Platforms (boards or simulators)
|
||||
|
||||
require linux-arm-platforms.inc
|
||||
Reference in New Issue
Block a user