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Complete Yocto mirror with license table for TQMa6UL (2038-compliance)

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- 264 license table entries with exact download URLs (224/264 resolved)
- Complete sources/ directory with all BitBake recipes
- Build configuration: tqma6ul-multi-mba6ulx, spaetzle (musl)
- Full traceability for Softwarefreigabeantrag
- GCC 13.4.0, Linux 6.6.102, U-Boot 2023.04, musl 1.2.4
- License distribution: GPL-2.0 (24), MIT (23), GPL-2.0+ (18), BSD-3 (16)
This commit is contained in:
Siggi (OpenClaw Agent)
2026-03-01 20:58:18 +00:00
commit 16accb6b24
15086 changed files with 1292356 additions and 0 deletions
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488
sources/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/corstone1000/0001-remoteproc-Add-Arm-remoteproc-driver.patch Normal file
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@@ -0,0 +1,488 @@
From f9881d01669cd98e6f897214f407dce8a245bdfe Mon Sep 17 00:00:00 2001
From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Date: Mon, 19 Feb 2024 16:01:28 +0000
Subject: [PATCH 1/6] remoteproc: Add Arm remoteproc driver
introduce remoteproc support for Arm remote processors
The supported remote processors are those that come with a reset
control register and a reset status register. The driver allows to
switch on or off the remote processor.
The current use case is Corstone-1000 External System (Cortex-M3).
The driver can be extended to support other remote processors
controlled with a reset control and a reset status registers.
The driver also supports control of multiple remote processors at the
same time.
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Upstream-Status: Submitted [cover letter: https://lore.kernel.org/all/20240301164227.339208-1-abdellatif.elkhlifi@arm.com/]
---
MAINTAINERS | 6 +
drivers/remoteproc/Kconfig | 18 ++
drivers/remoteproc/Makefile | 1 +
drivers/remoteproc/arm_rproc.c | 395 +++++++++++++++++++++++++++++++++
4 files changed, 420 insertions(+)
create mode 100644 drivers/remoteproc/arm_rproc.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 8d1052fa6a69..54d6a40feea5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1764,6 +1764,12 @@ S: Maintained
F: Documentation/devicetree/bindings/interrupt-controller/arm,vic.yaml
F: drivers/irqchip/irq-vic.c
+ARM REMOTEPROC DRIVER
+M: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+L: linux-remoteproc@vger.kernel.org
+S: Maintained
+F: drivers/remoteproc/arm_rproc.c
+
ARM SMC WATCHDOG DRIVER
M: Julius Werner <jwerner@chromium.org>
R: Evan Benn <evanbenn@chromium.org>
diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
index 48845dc8fa85..57fbac454a5d 100644
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
@@ -365,6 +365,24 @@ config XLNX_R5_REMOTEPROC
It's safe to say N if not interested in using RPU r5f cores.
+config ARM_REMOTEPROC
+ tristate "Arm remoteproc support"
+ depends on HAS_IOMEM && ARM64
+ default n
+ help
+ Say y here to support Arm remote processors via the remote
+ processor framework.
+
+ The supported processors are those that come with a reset control register
+ and a reset status register. The design can be extended to support different
+ processors meeting these requirements.
+ The driver also supports control of multiple remote cores at the same time.
+
+ Supported remote cores:
+ Corstone-1000 External System (Cortex-M3)
+
+ It's safe to say N here.
+
endif # REMOTEPROC
endmenu
diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
index 91314a9b43ce..73126310835b 100644
--- a/drivers/remoteproc/Makefile
+++ b/drivers/remoteproc/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_STM32_RPROC) += stm32_rproc.o
obj-$(CONFIG_TI_K3_DSP_REMOTEPROC) += ti_k3_dsp_remoteproc.o
obj-$(CONFIG_TI_K3_R5_REMOTEPROC) += ti_k3_r5_remoteproc.o
obj-$(CONFIG_XLNX_R5_REMOTEPROC) += xlnx_r5_remoteproc.o
+obj-$(CONFIG_ARM_REMOTEPROC) += arm_rproc.o
diff --git a/drivers/remoteproc/arm_rproc.c b/drivers/remoteproc/arm_rproc.c
new file mode 100644
index 000000000000..6afa78ae7ad3
--- /dev/null
+++ b/drivers/remoteproc/arm_rproc.c
@@ -0,0 +1,395 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
+ *
+ * Authors:
+ * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/firmware.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/remoteproc.h>
+
+#include "remoteproc_internal.h"
+
+/**
+ * struct arm_rproc_reset_cfg - remote processor reset configuration
+ * @ctrl_reg: address of the control register
+ * @state_reg: address of the reset status register
+ */
+struct arm_rproc_reset_cfg {
+ void __iomem *ctrl_reg;
+ void __iomem *state_reg;
+};
+
+struct arm_rproc;
+
+/**
+ * struct arm_rproc_dcfg - Arm remote processor configuration
+ * @stop: stop callback function
+ * @start: start callback function
+ */
+struct arm_rproc_dcfg {
+ int (*stop)(struct rproc *rproc);
+ int (*start)(struct rproc *rproc);
+};
+
+/**
+ * struct arm_rproc - Arm remote processor instance
+ * @rproc: rproc handler
+ * @core_dcfg: device configuration pointer
+ * @reset_cfg: reset configuration registers
+ */
+struct arm_rproc {
+ struct rproc *rproc;
+ const struct arm_rproc_dcfg *core_dcfg;
+ struct arm_rproc_reset_cfg reset_cfg;
+};
+
+/* Definitions for Arm Corstone-1000 External System */
+
+#define EXTSYS_RST_CTRL_CPUWAIT BIT(0)
+#define EXTSYS_RST_CTRL_RST_REQ BIT(1)
+
+#define EXTSYS_RST_ACK_MASK GENMASK(2, 1)
+#define EXTSYS_RST_ST_RST_ACK(x) \
+ ((u8)(FIELD_GET(EXTSYS_RST_ACK_MASK, (x))))
+
+#define EXTSYS_RST_ACK_NO_RESET_REQ (0x0)
+#define EXTSYS_RST_ACK_NOT_COMPLETE (0x1)
+#define EXTSYS_RST_ACK_COMPLETE (0x2)
+#define EXTSYS_RST_ACK_RESERVED (0x3)
+
+#define EXTSYS_RST_ACK_POLL_TRIES (3)
+#define EXTSYS_RST_ACK_POLL_TIMEOUT (1000)
+
+/**
+ * arm_rproc_start_cs1000_extsys() - custom start function
+ * @rproc: pointer to the remote processor object
+ *
+ * Start function for Corstone-1000 External System.
+ * Allow the External System core start execute instructions.
+ *
+ * Return:
+ *
+ * 0 on success. Otherwise, failure
+ */
+static int arm_rproc_start_cs1000_extsys(struct rproc *rproc)
+{
+ struct arm_rproc *priv = rproc->priv;
+ u32 ctrl_reg;
+
+ /* CPUWAIT signal of the External System is de-asserted */
+ ctrl_reg = readl(priv->reset_cfg.ctrl_reg);
+ ctrl_reg &= ~EXTSYS_RST_CTRL_CPUWAIT;
+ writel(ctrl_reg, priv->reset_cfg.ctrl_reg);
+
+ return 0;
+}
+
+/**
+ * arm_rproc_cs1000_extsys_poll_rst_ack() - poll RST_ACK bits
+ * @rproc: pointer to the remote processor object
+ * @exp_ack: expected bits value
+ * @rst_ack: bits value read
+ *
+ * Tries to read RST_ACK bits until the timeout expires.
+ * EXTSYS_RST_ACK_POLL_TRIES tries are made,
+ * every EXTSYS_RST_ACK_POLL_TIMEOUT milliseconds.
+ *
+ * Return:
+ *
+ * 0 on success. Otherwise, failure
+ */
+static int arm_rproc_cs1000_extsys_poll_rst_ack(struct rproc *rproc,
+ u8 exp_ack, u8 *rst_ack)
+{
+ struct arm_rproc *priv = rproc->priv;
+ struct device *dev = rproc->dev.parent;
+ u32 state_reg;
+ int tries = EXTSYS_RST_ACK_POLL_TRIES;
+ unsigned long timeout;
+
+ do {
+ state_reg = readl(priv->reset_cfg.state_reg);
+ *rst_ack = EXTSYS_RST_ST_RST_ACK(state_reg);
+
+ if (*rst_ack == EXTSYS_RST_ACK_RESERVED) {
+ dev_err(dev, "unexpected RST_ACK value: 0x%x\n",
+ *rst_ack);
+ return -EINVAL;
+ }
+
+ /* expected ACK value read */
+ if ((*rst_ack & exp_ack) || (*rst_ack == exp_ack))
+ return 0;
+
+ timeout = msleep_interruptible(EXTSYS_RST_ACK_POLL_TIMEOUT);
+
+ if (timeout) {
+ dev_err(dev, "polling RST_ACK aborted\n");
+ return -ECONNABORTED;
+ }
+ } while (--tries);
+
+ dev_err(dev, "polling RST_ACK timed out\n");
+
+ return -ETIMEDOUT;
+}
+
+/**
+ * arm_rproc_stop_cs1000_extsys() - custom stop function
+ * @rproc: pointer to the remote processor object
+ *
+ * Reset all logic within the External System, the core will be in a halt state.
+ *
+ * Return:
+ *
+ * 0 on success. Otherwise, failure
+ */
+static int arm_rproc_stop_cs1000_extsys(struct rproc *rproc)
+{
+ struct arm_rproc *priv = rproc->priv;
+ struct device *dev = rproc->dev.parent;
+ u32 ctrl_reg;
+ u8 rst_ack, req_status;
+ int ret;
+
+ ctrl_reg = readl(priv->reset_cfg.ctrl_reg);
+ ctrl_reg |= EXTSYS_RST_CTRL_RST_REQ;
+ writel(ctrl_reg, priv->reset_cfg.ctrl_reg);
+
+ ret = arm_rproc_cs1000_extsys_poll_rst_ack(rproc,
+ EXTSYS_RST_ACK_COMPLETE |
+ EXTSYS_RST_ACK_NOT_COMPLETE,
+ &rst_ack);
+ if (ret)
+ return ret;
+
+ req_status = rst_ack;
+
+ ctrl_reg = readl(priv->reset_cfg.ctrl_reg);
+ ctrl_reg &= ~EXTSYS_RST_CTRL_RST_REQ;
+ writel(ctrl_reg, priv->reset_cfg.ctrl_reg);
+
+ ret = arm_rproc_cs1000_extsys_poll_rst_ack(rproc, 0, &rst_ack);
+ if (ret)
+ return ret;
+
+ if (req_status == EXTSYS_RST_ACK_COMPLETE) {
+ dev_dbg(dev, "the requested reset has been accepted\n");
+ return 0;
+ }
+
+ dev_err(dev, "the requested reset has been denied\n");
+ return -EACCES;
+}
+
+static const struct arm_rproc_dcfg arm_rproc_cfg_corstone1000_extsys = {
+ .stop = arm_rproc_stop_cs1000_extsys,
+ .start = arm_rproc_start_cs1000_extsys,
+};
+
+/**
+ * arm_rproc_stop() - Stop function for rproc_ops
+ * @rproc: pointer to the remote processor object
+ *
+ * Calls the stop() callback of the remote core
+ *
+ * Return:
+ *
+ * 0 on success. Otherwise, failure
+ */
+static int arm_rproc_stop(struct rproc *rproc)
+{
+ struct arm_rproc *priv = rproc->priv;
+
+ return priv->core_dcfg->stop(rproc);
+}
+
+/**
+ * arm_rproc_start() - Start function for rproc_ops
+ * @rproc: pointer to the remote processor object
+ *
+ * Calls the start() callback of the remote core
+ *
+ * Return:
+ *
+ * 0 on success. Otherwise, failure
+ */
+static int arm_rproc_start(struct rproc *rproc)
+{
+ struct arm_rproc *priv = rproc->priv;
+
+ return priv->core_dcfg->start(rproc);
+}
+
+/**
+ * arm_rproc_parse_fw() - Parse firmware function for rproc_ops
+ * @rproc: pointer to the remote processor object
+ * @fw: pointer to the firmware
+ *
+ * Does nothing currently.
+ *
+ * Return:
+ *
+ * 0 for success.
+ */
+static int arm_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
+{
+ return 0;
+}
+
+/**
+ * arm_rproc_load() - Load firmware to memory function for rproc_ops
+ * @rproc: pointer to the remote processor object
+ * @fw: pointer to the firmware
+ *
+ * Does nothing currently.
+ *
+ * Return:
+ *
+ * 0 for success.
+ */
+static int arm_rproc_load(struct rproc *rproc, const struct firmware *fw)
+{
+ return 0;
+}
+
+static const struct rproc_ops arm_rproc_ops = {
+ .start = arm_rproc_start,
+ .stop = arm_rproc_stop,
+ .load = arm_rproc_load,
+ .parse_fw = arm_rproc_parse_fw,
+};
+
+/**
+ * arm_rproc_probe() - the platform device probe
+ * @pdev: the platform device
+ *
+ * Read from the device tree the properties needed to setup
+ * the reset and comms for the remote processor.
+ * Also, allocate a rproc device and register it with the remoteproc subsystem.
+ *
+ * Return:
+ *
+ * 0 on success. Otherwise, failure
+ */
+static int arm_rproc_probe(struct platform_device *pdev)
+{
+ const struct arm_rproc_dcfg *core_dcfg;
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct arm_rproc *priv;
+ struct rproc *rproc;
+ const char *fw_name;
+ int ret;
+ struct resource *res;
+
+ core_dcfg = of_device_get_match_data(dev);
+ if (!core_dcfg)
+ return -ENODEV;
+
+ ret = rproc_of_parse_firmware(dev, 0, &fw_name);
+ if (ret) {
+ dev_err(dev,
+ "can't parse firmware-name from device tree (%pe)\n",
+ ERR_PTR(ret));
+ return ret;
+ }
+
+ dev_dbg(dev, "firmware-name: %s\n", fw_name);
+
+ rproc = rproc_alloc(dev, np->name, &arm_rproc_ops, fw_name,
+ sizeof(*priv));
+ if (!rproc)
+ return -ENOMEM;
+
+ priv = rproc->priv;
+ priv->rproc = rproc;
+ priv->core_dcfg = core_dcfg;
+
+ res = platform_get_resource_byname(pdev,
+ IORESOURCE_MEM, "reset-control");
+ priv->reset_cfg.ctrl_reg = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(priv->reset_cfg.ctrl_reg)) {
+ ret = PTR_ERR(priv->reset_cfg.ctrl_reg);
+ dev_err(dev,
+ "can't map the reset-control register (%pe)\n",
+ ERR_PTR((unsigned long)priv->reset_cfg.ctrl_reg));
+ goto err_free_rproc;
+ } else {
+ dev_dbg(dev, "reset-control: %p\n", priv->reset_cfg.ctrl_reg);
+ }
+
+ res = platform_get_resource_byname(pdev,
+ IORESOURCE_MEM, "reset-status");
+ priv->reset_cfg.state_reg = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(priv->reset_cfg.state_reg)) {
+ ret = PTR_ERR(priv->reset_cfg.state_reg);
+ dev_err(dev,
+ "can't map the reset-status register (%pe)\n",
+ ERR_PTR((unsigned long)priv->reset_cfg.state_reg));
+ goto err_free_rproc;
+ } else {
+ dev_dbg(dev, "reset-status: %p\n",
+ priv->reset_cfg.state_reg);
+ }
+
+ platform_set_drvdata(pdev, rproc);
+
+ ret = rproc_add(rproc);
+ if (ret) {
+ dev_err(dev, "can't add remote processor (%pe)\n",
+ ERR_PTR(ret));
+ goto err_free_rproc;
+ } else {
+ dev_dbg(dev, "remote processor added\n");
+ }
+
+ return 0;
+
+err_free_rproc:
+ rproc_free(rproc);
+
+ return ret;
+}
+
+/**
+ * arm_rproc_remove() - the platform device remove
+ * @pdev: the platform device
+ *
+ * Delete and free the resources used.
+ */
+static void arm_rproc_remove(struct platform_device *pdev)
+{
+ struct rproc *rproc = platform_get_drvdata(pdev);
+
+ rproc_del(rproc);
+ rproc_free(rproc);
+}
+
+static const struct of_device_id arm_rproc_of_match[] = {
+ { .compatible = "arm,corstone1000-extsys", .data = &arm_rproc_cfg_corstone1000_extsys },
+ {},
+};
+MODULE_DEVICE_TABLE(of, arm_rproc_of_match);
+
+static struct platform_driver arm_rproc_driver = {
+ .probe = arm_rproc_probe,
+ .remove_new = arm_rproc_remove,
+ .driver = {
+ .name = "arm-rproc",
+ .of_match_table = arm_rproc_of_match,
+ },
+};
+module_platform_driver(arm_rproc_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Arm Remote Processor Control Driver");
+MODULE_AUTHOR("Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>");
--
2.25.1

42
sources/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/corstone1000/0002-arm64-dts-Add-corstone1000-external-system-device-no.patch Normal file
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@@ -0,0 +1,42 @@
From 0122f194e4a6fb50750dadd08f2354e78d4dd79c Mon Sep 17 00:00:00 2001
From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Date: Mon, 19 Feb 2024 16:18:37 +0000
Subject: [PATCH 2/6] arm64: dts: Add corstone1000 external system device node
add device tree node for the external system core in Corstone-1000
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Upstream-Status: Submitted [cover letter: https://lore.kernel.org/all/20240301164227.339208-1-abdellatif.elkhlifi@arm.com/]
---
arch/arm64/boot/dts/arm/corstone1000.dtsi | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi
index 6ad7829f9e28..67df642363e9 100644
--- a/arch/arm64/boot/dts/arm/corstone1000.dtsi
+++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
- * Copyright (c) 2022, Arm Limited. All rights reserved.
+ * Copyright 2022, 2024, Arm Limited and/or its affiliates <open-source-office@arm.com>
* Copyright (c) 2022, Linaro Limited. All rights reserved.
*
*/
@@ -157,5 +157,13 @@ mhu_seh1: mailbox@1b830000 {
secure-status = "okay"; /* secure-world-only */
status = "disabled";
};
+
+ extsys0: remoteproc@1a010310 {
+ compatible = "arm,corstone1000-extsys";
+ reg = <0x1a010310 0x4>,
+ <0x1a010314 0X4>;
+ reg-names = "reset-control", "reset-status";
+ firmware-name = "es_flashfw.elf";
+ };
};
};
--
2.25.1

105
sources/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/corstone1000/0003-dt-bindings-remoteproc-Add-Arm-remoteproc.patch Normal file
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@@ -0,0 +1,105 @@
From af50eca3e3b408f2f1f378c1d0c48fb6c3107c8c Mon Sep 17 00:00:00 2001
From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Date: Mon, 19 Feb 2024 20:47:26 +0000
Subject: [PATCH 3/6] dt-bindings: remoteproc: Add Arm remoteproc
introduce the bindings for Arm remoteproc support.
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Upstream-Status: Submitted [cover letter: https://lore.kernel.org/all/20240301164227.339208-1-abdellatif.elkhlifi@arm.com/]
---
.../bindings/remoteproc/arm,rproc.yaml | 69 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 70 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/arm,rproc.yaml
diff --git a/Documentation/devicetree/bindings/remoteproc/arm,rproc.yaml b/Documentation/devicetree/bindings/remoteproc/arm,rproc.yaml
new file mode 100644
index 000000000000..322197158059
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/arm,rproc.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/arm,rproc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Remoteproc Devices
+
+maintainers:
+ - Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+description: |
+ Some Arm heterogeneous System-On-Chips feature remote processors that can
+ be controlled with a reset control register and a reset status register to
+ start or stop the processor.
+
+ This document defines the bindings for these remote processors.
+
+properties:
+ compatible:
+ enum:
+ - arm,corstone1000-extsys
+
+ reg:
+ minItems: 2
+ maxItems: 2
+ description: |
+ Address and size in bytes of the reset control register
+ and the reset status register.
+ Expects the registers to be in the order as above.
+ Should contain an entry for each value in 'reg-names'.
+
+ reg-names:
+ description: |
+ Required names for each of the reset registers defined in
+ the 'reg' property. Expects the names from the following
+ list, in the specified order, each representing the corresponding
+ reset register.
+ items:
+ - const: reset-control
+ - const: reset-status
+
+ firmware-name:
+ description: |
+ Default name of the firmware to load to the remote processor.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - firmware-name
+
+additionalProperties: false
+
+examples:
+ - |
+ extsys0: remoteproc@1a010310 {
+ compatible = "arm,corstone1000-extsys";
+ reg = <0x1a010310 0x4>, <0x1a010314 0x4>;
+ reg-names = "reset-control", "reset-status";
+ firmware-name = "es0_flashfw.elf";
+ };
+
+ extsys1: remoteproc@1a010318 {
+ compatible = "arm,corstone1000-extsys";
+ reg = <0x1a010318 0x4>, <0x1a01031c 0x4>;
+ reg-names = "reset-control", "reset-status";
+ firmware-name = "es1_flashfw.elf";
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 54d6a40feea5..eddaa3841a65 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1768,6 +1768,7 @@ ARM REMOTEPROC DRIVER
M: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
L: linux-remoteproc@vger.kernel.org
S: Maintained
+F: Documentation/devicetree/bindings/remoteproc/arm,rproc.yaml
F: drivers/remoteproc/arm_rproc.c
ARM SMC WATCHDOG DRIVER
--
2.25.1

3
sources/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/corstone1000/corstone1000_kernel_debug.cfg Normal file
View File

@@ -0,0 +1,3 @@
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_INFO_DWARF4=y

124
sources/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/corstone1000/defconfig Normal file
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@@ -0,0 +1,124 @@
CONFIG_LOCALVERSION="-yocto-standard"
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_LOG_BUF_SHIFT=13
CONFIG_LOG_CPU_MAX_BUF_SHIFT=13
CONFIG_RELAY=y
CONFIG_BOOT_CONFIG=y
CONFIG_ARCH_VEXPRESS=y
CONFIG_CMDLINE="console=ttyAMA0 loglevel=9"
# CONFIG_SUSPEND is not set
# CONFIG_STACKPROTECTOR is not set
CONFIG_MODULES=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_SYN_COOKIES=y
CONFIG_NET_SCHED=y
CONFIG_DEVTMPFS=y
CONFIG_EFI_BOOTLOADER_CONTROL=y
CONFIG_EFI_CAPSULE_LOADER=y
CONFIG_EFI_TEST=y
CONFIG_RESET_ATTACK_MITIGATION=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AMD is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CADENCE is not set
# CONFIG_NET_VENDOR_CAVIUM is not set
# CONFIG_NET_VENDOR_CORTINA is not set
# CONFIG_NET_VENDOR_EZCHIP is not set
# CONFIG_NET_VENDOR_GOOGLE is not set
# CONFIG_NET_VENDOR_HISILICON is not set
# CONFIG_NET_VENDOR_HUAWEI is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
# CONFIG_NET_VENDOR_MICROSEMI is not set
# CONFIG_NET_VENDOR_NI is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_PENSANDO is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set
# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set
CONFIG_SMC91X=y
CONFIG_SMSC911X=y
# CONFIG_NET_VENDOR_SOCIONEXT is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
# CONFIG_NET_VENDOR_XILINX is not set
# CONFIG_SERIO_SERPORT is not set
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_UAS=y
CONFIG_USB_ISP1760=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_PL031=y
CONFIG_TEE=y
CONFIG_OPTEE=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_CONFIGFS_FS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_860=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=y
CONFIG_NLS_UTF8=y
CONFIG_LIBCRC32C=y
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_DEBUG_FS=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_REGULATOR=y
# CONFIG_REGULATOR_DEBUG is not set
CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
# CONFIG_REGULATOR_GPIO is not set
# CONFIG_REGULATOR_VCTRL is not set
# CONFIG_REGULATOR_VEXPRESS is not set
CONFIG_MMC=y
# CONFIG_PWRSEQ_EMMC is not set
CONFIG_PWRSEQ_SIMPLE=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=8
# CONFIG_SDIO_UART is not set
# CONFIG_MMC_TEST is not set
# CONFIG_MMC_DEBUG is not set
CONFIG_MMC_ARMMMCI=y
# CONFIG_MMC_STM32_SDMMC is not set
# CONFIG_MMC_SDHCI is not set
# CONFIG_MMC_DW is not set
# CONFIG_MMC_VUB300 is not set
# CONFIG_MMC_USHC is not set
# CONFIG_MMC_USDHI6ROL0 is not set
# CONFIG_MMC_CQHCI is not set
# CONFIG_MMC_HSQ is not set
# CONFIG_MMC_MTK is not set
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
CONFIG_EXT3_FS=y
CONFIG_EXT4_FS=y
# CONFIG_EXT4_FS_POSIX_ACL is not set
# CONFIG_EXT4_FS_SECURITY is not set
# CONFIG_EXT4_DEBUG is not set

2
sources/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/corstone1000/extsys.cfg Normal file
View File

@@ -0,0 +1,2 @@
CONFIG_REMOTEPROC=y
CONFIG_ARM_REMOTEPROC=y

29
sources/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/fvp-base/0001-arm64-dts-fvp-Enable-virtio-rng-support.patch Normal file
View File

@@ -0,0 +1,29 @@
From b443c8efd563dc372c60e7ad9f52aeddf7c13706 Mon Sep 17 00:00:00 2001
From: Anton Antonov <Anton.Antonov@arm.com>
Date: Mon, 7 Nov 2022 11:37:51 +0000
Subject: [PATCH] arm64: dts: fvp: Enable virtio-rng support
The virtio-rng is available from FVP_Base_RevC-2xAEMvA version 11.17.
Enable it since Yocto includes a recipe for a newer FVP version.
Upstream-Status: Inappropriate [Yocto specific]
Signed-off-by: Anton Antonov <Anton.Antonov@arm.com>
---
arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
index ec2d5280a30b..acafdcbf1063 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
@@ -26,7 +26,6 @@ virtio@200000 {
compatible = "virtio,mmio";
reg = <0x200000 0x200>;
interrupts = <46>;
- status = "disabled";
};
};
};
--
2.25.1

1
sources/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/no-fsl-ifc-nand.cfg Normal file
View File

@@ -0,0 +1 @@
CONFIG_MTD_NAND_FSL_IFC=n