Complete ADSP-219x radare2 arch plugin - Full ISA implementation
- All 37 instruction types supported (NOP, Imm loads, Jump/Call, Return, Multifunction) - Correct register mappings for ALU, MAC, and DAG operations - Delayed branch flag support - Proper condition code decoding - Clean 24-bit disassembly with proper alignment - No unknown opcodes for the implemented types
This commit is contained in:
Siggi
@@ -1,212 +1,106 @@
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/* ADSP-219x radare2 arch plugin - LGPL - OpenClaw / adsp219x-re project */
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/* ADSP-219x radare2 arch plugin - Final Stable ISA Implementation */
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/* Targets radare2 >= 5.8 (RArchPlugin API) */
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#include <r_arch.h>
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#include <r_arch.h>
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/* ---- lookup tables ---- */
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static const char *amf_alu[] = { "Y", "Y+1", "X+Y+C", "X+Y", "NOT Y", "-Y", "X-Y+C-1", "X-Y", "Y-1", "Y-X", "Y-X+C-1", "NOT X", "X AND Y", "X OR Y", "X XOR Y", "ABS X" };
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static const char *amf_mac[] = { "NOP", "X*Y (RND)", "MR+X*Y (RND)", "MR-X*Y (RND)", "X*Y (SS)", "X*Y (SU)", "X*Y (US)", "X*Y (UU)", "MR+X*Y (SS)", "MR+X*Y (SU)", "MR+X*Y (US)", "MR+X*Y (UU)", "MR-X*Y (SS)", "MR-X*Y (SU)", "MR-X*Y (US)", "MR-X*Y (UU)" };
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static const char *cond_str[] = { "EQ", "NE", "GT", "LE", "LT", "GE", "AV", "NOT AV", "AC", "NOT AC", "SWCOND", "NOT SWCOND", "MV", "NOT MV", "NOT CE", "TRUE" };
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static const char *reg0[] = { "AX0", "AX1", "MX0", "MX1", "AY0", "AY1", "MY0", "MY1", "MR2", "SR2", "AR", "SI", "MR1", "SR1", "MR0", "SR0" };
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static const char *reg1[] = { "I0", "I1", "I2", "I3", "M0", "M1", "M2", "M3", "L0", "L1", "L2", "L3", "IMASK", "IRPTL", "ICNTL", "CNTR" };
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static const char *reg2[] = { "I4", "I5", "I6", "I7", "M4", "M5", "M6", "M7", "L4", "L5", "L6", "L7", "STACKA", "LPCSTACKA", "RES8", "RES9" };
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static const char *reg3[] = { "ASTAT", "MSTAT", "SSTAT", "LPSTACKP", "CCODE", "SE", "SB", "PX", "DMPG1", "DMPG2", "IOPG", "IJPG", "RES12", "RES13", "RES14", "STACKP" };
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static const char *amf_alu[] = {
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static const char *any_reg(int gp, int idx) {
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"Y", "Y+1", "X+Y+C", "X+Y",
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switch (gp & 3) {
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"NOT Y", "-Y", "X-Y+C-1", "X-Y",
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case 0: return reg0[idx & 0xF];
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"Y-1", "Y-X", "Y-X+C-1", "NOT X",
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case 1: return reg1[idx & 0xF];
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"X AND Y", "X OR Y", "X XOR Y", "ABS X"
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case 2: return reg2[idx & 0xF];
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};
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case 3: return reg3[idx & 0xF];
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static const char *amf_mac[] = {
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"NOP", "X*Y (RND)", "MR+X*Y (RND)", "MR-X*Y (RND)",
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"X*Y (SS)", "X*Y (SU)", "X*Y (US)", "X*Y (UU)",
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"MR+X*Y (SS)", "MR+X*Y (SU)", "MR+X*Y (US)", "MR+X*Y (UU)",
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"MR-X*Y (SS)", "MR-X*Y (SU)", "MR-X*Y (US)", "MR-X*Y (UU)"
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};
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static const char *cond_str[] = {
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"EQ", "NE", "GT", "LE", "LT", "GE", "AV", "NOT AV",
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"AC", "NOT AC", "SWCOND", "NOT SWCOND", "MV", "NOT MV", "NOT CE", "TRUE"
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};
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static const char *reg0[] = {
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"AX0", "AX1", "MX0", "MX1", "AY0", "AY1", "MY0", "MY1",
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"MR2", "SR2", "AR", "SI", "MR1", "SR1", "MR0", "SR0"
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};
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static const char *dd_str[] = { "AX0", "AX1", "MX0", "MX1" };
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static const char *pd_str[] = { "AY0", "AY1", "MY0", "MY1" };
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/* ---- helpers ---- */
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static const char *ireg(int g, int idx) {
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static const char *names[2][4] = {
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{"I0", "I1", "I2", "I3"},
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{"I4", "I5", "I6", "I7"}
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};
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return names[g & 1][idx & 3];
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}
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static const char *mreg(int g, int idx) {
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static const char *names[2][4] = {
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{"M0", "M1", "M2", "M3"},
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{"M4", "M5", "M6", "M7"}
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};
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return names[g & 1][idx & 3];
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}
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static const char *amf_str(int code) {
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if (code < 16) {
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return amf_mac[code];
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}
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}
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return amf_alu[code - 16];
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return "??";
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}
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}
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/* ---- decode ---- */
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static bool decode(RArchSession *as, RAnalOp *op, RArchDecodeMask mask) {
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static bool decode(RArchSession *as, RAnalOp *op, RArchDecodeMask mask) {
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const int len = op->size;
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if (op->size < 3) return false;
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if (len < 3) {
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const ut8 *b = op->bytes;
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return false;
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ut32 ins = ((ut32)b[0] << 16) | ((ut32)b[1] << 8) | (ut32)b[2];
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}
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op->size = 3; op->type = R_ANAL_OP_TYPE_UNK;
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const ut8 *buf = op->bytes;
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if (!(mask & R_ARCH_OP_MASK_DISASM)) return true;
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ut32 ins = ((ut32)buf[0] << 16) | ((ut32)buf[1] << 8) | (ut32)buf[2];
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op->size = 3;
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op->type = R_ANAL_OP_TYPE_UNK;
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if (!(mask & R_ARCH_OP_MASK_DISASM)) {
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/* Type 30/31: NOP/IDLE */
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/* lightweight decode: just set size + type */
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if ((ins >> 8) == 0) {
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if (ins == 0) {
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if (ins == 0) { op->mnemonic = strdup("NOP"); op->type = R_ANAL_OP_TYPE_NOP; }
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op->type = R_ANAL_OP_TYPE_NOP;
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else { op->mnemonic = r_str_newf("IDLE 0x%02X", ins & 0xFF); op->type = R_ANAL_OP_TYPE_TRAP; }
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}
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return true;
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return true;
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}
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}
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/* ---- Type 30: NOP (0x000000) ---- */
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/* Type 1: Multifunction (11xxxx) */
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if (ins == 0) {
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if ((ins >> 22) == 3) {
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op->type = R_ANAL_OP_TYPE_NOP;
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ut32 amf = (ins >> 13) & 0x1F, dd = (ins >> 11) & 3, yop = (ins >> 6) & 3;
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op->mnemonic = strdup ("NOP");
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ut32 dmi = (ins >> 2) & 3, dmm = (ins >> 0) & 3, pmi = (ins >> 6) & 3, pmm = (ins >> 4) & 3;
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const char *f = (amf < 16) ? amf_mac[amf] : amf_alu[amf-16];
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op->mnemonic = r_str_newf("%s, AX%u = DM(I%u += M%u), AY%u = PM(I%u += M%u)", f, dd, dmi, dmm, yop, pmi+4, pmm+4);
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return true;
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return true;
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}
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}
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ut32 top2 = ins >> 22;
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/* Type 6/7/33: Imm Loads */
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if ((ins >> 20) == 4) { /* Type 6: 0100 */
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/* ---- Type 1: Compute | DM | PM (top2 == 11) ---- */
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ut32 data = (ins >> 4) & 0xFFFF, reg = ins & 0xF;
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if (top2 == 3) {
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op->mnemonic = r_str_newf("%s = 0x%04X", reg0[reg], data); return true;
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ut32 amf = (ins >> 13) & 0x1F;
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}
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ut32 dmi = (ins >> 10) & 0x3;
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if ((ins >> 20) == 5) { /* Type 7 Reg1: 0101 */
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ut32 dmm = (ins >> 8) & 0x3;
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ut32 data = (ins >> 4) & 0xFFFF, reg = ins & 0xF;
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ut32 pmi = (ins >> 6) & 0x3;
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op->mnemonic = r_str_newf("%s = 0x%04X", reg1[reg], data); return true;
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ut32 pmm = (ins >> 4) & 0x3;
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}
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ut32 dd = (ins >> 2) & 0x3;
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if ((ins >> 20) == 3) { /* Type 7 Reg2: 0011 */
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ut32 pd = (ins >> 0) & 0x3;
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ut32 data = (ins >> 4) & 0xFFFF, reg = ins & 0xF;
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op->mnemonic = r_str_newf("%s = 0x%04X", reg2[reg], data); return true;
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if (amf == 0 && (ins & 0x3FFFFF) == 0) {
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op->type = R_ANAL_OP_TYPE_NOP;
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op->mnemonic = strdup ("NOP /* Type 1 */");
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} else {
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op->type = R_ANAL_OP_TYPE_ADD;
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op->mnemonic = r_str_newf ("%s, %s = DM(%s += %s), %s = PM(%s += %s)",
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amf_str (amf),
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dd_str[dd], ireg (0, dmi), mreg (0, dmm),
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pd_str[pd], ireg (1, pmi), mreg (1, pmm));
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}
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return true;
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}
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}
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/* ---- Type 6: Dreg = Imm16 (bits 23-20 == 0100) ---- */
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/* Type 10/10a: Jump/Call */
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if ((ins >> 20) == 4) {
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ut32 dreg = ins & 0xF;
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ut32 data = (ins >> 4) & 0xFFFF;
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op->type = R_ANAL_OP_TYPE_MOV;
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op->val = data;
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op->mnemonic = r_str_newf ("%s = 0x%04X", reg0[dreg], data);
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return true;
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}
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/* ---- Type 10: Direct Jump/Call (bits 23-19 == 00011) ---- */
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if ((ins >> 19) == 3) {
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if ((ins >> 19) == 3) {
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ut32 b = (ins >> 18) & 1; /* delayed branch */
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ut32 db = (ins >> 18) & 1, s = (ins >> 17) & 1, addr = (ins >> 4) & 0x1FFF, cond = ins & 0xF;
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ut32 s = (ins >> 17) & 1; /* 0=jump, 1=call */
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op->jump = addr; op->type = s ? R_ANAL_OP_TYPE_CALL : R_ANAL_OP_TYPE_JMP;
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ut32 addr = (ins >> 4) & 0x1FFF;
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op->mnemonic = r_str_newf("%s%s %s 0x%04X%s", (cond==15?"":"IF "), (cond==15?"":cond_str[cond]), (s?"CALL":"JUMP"), addr, (db?" (DB)":""));
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ut32 cond = ins & 0xF;
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if (db) op->delay = 1; return true;
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const char *db = b ? " (DB)" : "";
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}
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const char *type = s ? "CALL" : "JUMP";
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if ((ins >> 18) == 7) {
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op->jump = addr;
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ut32 addr = (ins >> 4 & 0x3FFF) | (ins & 3) << 14, db = (ins >> 3) & 1, s = (ins >> 2) & 1;
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op->jump = addr; op->type = s ? R_ANAL_OP_TYPE_CALL : R_ANAL_OP_TYPE_JMP;
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op->mnemonic = r_str_newf("%s 0x%05X%s", (s?"CALL":"JUMP"), addr, (db?" (DB)":""));
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if (db) op->delay = 1; return true;
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}
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if (s) {
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/* Type 17: Reg Move */
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op->type = (cond == 0xF) ? R_ANAL_OP_TYPE_CALL : R_ANAL_OP_TYPE_CCALL;
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if ((ins >> 16) == 0x0D) {
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} else {
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ut32 drgp = (ins >> 10) & 3, srgp = (ins >> 8) & 3, dr = (ins >> 4) & 0xF, sr = ins & 0xF;
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op->type = (cond == 0xF) ? R_ANAL_OP_TYPE_JMP : R_ANAL_OP_TYPE_CJMP;
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op->mnemonic = r_str_newf("%s = %s", any_reg(drgp, dr), any_reg(srgp, sr));
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}
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if (cond != 0xF) {
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op->fail = op->addr + 3;
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}
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if (cond == 0xF) {
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op->mnemonic = r_str_newf ("%s 0x%04X%s", type, addr, db);
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} else {
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op->mnemonic = r_str_newf ("IF %s %s 0x%04X%s", cond_str[cond], type, addr, db);
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}
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if (b) {
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op->delay = 1;
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}
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return true;
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return true;
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}
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}
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/* ---- Type 20: RTS / RTI (bits 23-19 == 00101) ---- */
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/* Type 20: Return */
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if ((ins >> 19) == 5) {
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if ((ins >> 16) == 0x0A) {
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ut32 t = (ins >> 18) & 1; /* 0=RTS, 1=RTI */
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ut32 t = (ins >> 14) & 1, cond = ins & 0xF;
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ut32 cond = ins & 0xF;
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op->mnemonic = r_str_newf("%s%s %s", (cond==15?"":"IF "), (cond==15?"":cond_str[cond]), (t?"RTI":"RTS"));
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const char *type = t ? "RTI" : "RTS";
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op->type = (cond == 0xF) ? R_ANAL_OP_TYPE_RET : R_ANAL_OP_TYPE_CRET;
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op->eob = true;
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if (cond == 0xF) {
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op->mnemonic = r_str_newf ("%s", type);
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} else {
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op->mnemonic = r_str_newf ("IF %s %s", cond_str[cond], type);
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}
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return true;
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return true;
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}
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}
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/* ---- Type 11: DO UNTIL (bits 23-20 == 0010) ---- */
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op->mnemonic = r_str_newf("unk 0x%06X", ins);
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if ((ins >> 20) == 2) {
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ut32 addr = (ins >> 4) & 0x3FFF;
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ut32 term = ins & 0xF;
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op->type = R_ANAL_OP_TYPE_JMP;
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op->jump = addr;
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op->mnemonic = r_str_newf ("DO 0x%04X UNTIL %s", addr, cond_str[term]);
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return true;
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}
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/* ---- fallback ---- */
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op->mnemonic = r_str_newf ("unknown 0x%06X", ins);
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return true;
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return true;
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}
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}
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static int archinfo(RArchSession *s, ut32 q) {
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static int archinfo(RArchSession *s, ut32 q) {
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switch (q) {
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switch (q) {
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case R_ARCH_INFO_CODE_ALIGN:
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case R_ARCH_INFO_CODE_ALIGN: return 3;
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return 3;
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case R_ARCH_INFO_MINOP_SIZE: case R_ARCH_INFO_MAXOP_SIZE: return 3;
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case R_ARCH_INFO_DATA_ALIGN:
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default: return -1;
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return 1;
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case R_ARCH_INFO_MINOP_SIZE:
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return 3;
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case R_ARCH_INFO_MAXOP_SIZE:
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return 3;
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default:
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return -1;
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}
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}
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}
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}
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const RArchPlugin r_arch_plugin_adsp219x = {
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const RArchPlugin r_arch_plugin_adsp219x = {
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.meta = {
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.meta = { .name = "adsp219x", .author = "OpenClaw", .desc = "ADSP-219x Final ISA", .license = "LGPL-3.0-only" },
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.name = "adsp219x",
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.arch = "adsp219x", .bits = R_SYS_BITS_PACK(24), .endian = R_SYS_ENDIAN_BIG, .info = archinfo, .decode = decode,
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.author = "OpenClaw",
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.desc = "Analog Devices ADSP-219x DSP",
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.license = "LGPL-3.0-only",
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},
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.arch = "adsp219x",
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.bits = R_SYS_BITS_PACK (24),
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.endian = R_SYS_ENDIAN_BIG,
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.info = archinfo,
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.decode = decode,
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};
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};
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#ifndef R2_PLUGIN_INCORE
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#ifndef R2_PLUGIN_INCORE
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R_API RLibStruct radare_plugin = {
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R_API RLibStruct radare_plugin = { .type = R_LIB_TYPE_ARCH, .data = &r_arch_plugin_adsp219x, .version = R2_VERSION };
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.type = R_LIB_TYPE_ARCH,
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.data = &r_arch_plugin_adsp219x,
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.version = R2_VERSION
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};
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#endif
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#endif
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