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Fix Type 1 AMF bitfield and add real FIR/IIR test ROMs

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- Fix Type 1 multifunction: AMF=bits17-13, DD=bits19-18, PD=bits21-20
  (was off by one bit, causing wrong MAC decode on real firmware)
- Add FIR filter ROM (fir.bin): 52 instructions, assembled from AD example
- Add IIR biquad ROM (iir.bin): 28 instructions, assembled from AD example
- Add open21xx-compatible source files (build/fir.dsp, build/iir.dsp)
- Both ROMs disassemble correctly showing expected DSP patterns:
  MAC+dual-read kernels, DO UNTIL loops, ASHIFT scaling, RTS(DB)
- Full regression: isa_test.bin unchanged
This commit is contained in:
Dr. Christian Giessen
2026-04-22 19:47:12 +00:00
parent 13521048bc
commit 6849a701d4
9 changed files with 126 additions and 4 deletions
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69
examples/build/fir.dsp Normal file
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/*
* fir.dsp -- ADSP-2191 FIR filter adapted for open21xx assembler.
* Based on Analog Devices application note.
*/
.section/PM program0;
.global _start;
_start:
/* Setup DAGs */
i0 = 0x0100; /* delay line */
i1 = 0x0200; /* input samples */
i2 = 0x0300; /* output */
i4 = 0x0400; /* coefficients (PM) */
l0 = 31; /* circular buffer length */
l4 = 31;
m0 = 1;
m1 = 1;
m3 = -1;
m4 = 1;
/* FIR kernel */
mr = 0, mx0 = dm(i1,m1), my0 = pm(i4,m4);
dm(i0,m3) = mx0;
cntr = 40;
do _mult_acc until ce;
/* Inner loop: 30 taps (unrolled) */
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
/* Last tap + output chain */
mr=mr+mx0*my0(ss), mx0=dm(i0,m1), my0=pm(i4,m4);
sr=ashift mr2 (hi), mx0=dm(i1,m1);
sr=sr or lshift mr1 (lo), dm(i0,m3) = mx0;
_mult_acc:
mr = 0, dm(i2,m1) = sr0;
rts (db);
mx0 = dm(i0,m1);
mx0 = dm(i1,m3);
_halt:
jump _halt;