2 Commits

Author	SHA1	Message	Date
Siggi	29dc1f1bd2	Update all docs and test generator to match verified assembler opcodes ... - README.md: Complete project overview with plugin status - ARCHITECTURE.md: Fixed register tables (CNTR in REG1, not REG2) - GETTING_STARTED.md: r2-native workflow, removed Python disasm refs - PRACTICAL_EXAMPLE.md: Uses verified open21xx opcodes with bit layouts - ROM_ANALYSIS_WALKTHROUGH.md: Updated format detection and r2 commands - r2plugin/README.md: Simplified, points to assembler test ROM - gen_isa_test.py: All opcodes from open21xx assembler with labels	2026-04-22 18:46:54 +00:00
Siggi	631dcfc094	Add ROM analysis walkthrough documentation	2026-04-12 13:55:24 +00:00