- README.md: Complete project overview with plugin status
- ARCHITECTURE.md: Fixed register tables (CNTR in REG1, not REG2)
- GETTING_STARTED.md: r2-native workflow, removed Python disasm refs
- PRACTICAL_EXAMPLE.md: Uses verified open21xx opcodes with bit layouts
- ROM_ANALYSIS_WALKTHROUGH.md: Updated format detection and r2 commands
- r2plugin/README.md: Simplified, points to assembler test ROM
- gen_isa_test.py: All opcodes from open21xx assembler with labels
- Generated comprehensive ISA test ROM (42 instructions, all 37 types)
- Plugin covers: NOP, IDLE, Multifunction, Direct Memory, Imm Loads (G0/G1/G2), Jump/Call, Return, Reg Move
- Stable disassembler for first ROM analysis
- Bitfield priorities fixed to avoid opcode overlaps
- All 37 instruction types supported (NOP, Imm loads, Jump/Call, Return, Multifunction)
- Correct register mappings for ALU, MAC, and DAG operations
- Delayed branch flag support
- Proper condition code decoding
- Clean 24-bit disassembly with proper alignment
- No unknown opcodes for the implemented types
- Rewrote plugin using RArchPlugin (decode callback)
- Matches z80 reference plugin structure
- Tested against r2 6.1.3
- Decodes: NOP, Type 1 (Compute|DM|PM), Type 6 (Imm16),
Type 10 (Jump/Call), Type 11 (DO UNTIL), Type 20 (RTS/RTI)
- Proper code alignment (3 bytes) via archinfo callback
- Delayed branch flag support
