- Fix Type 1 multifunction: AMF=bits17-13, DD=bits19-18, PD=bits21-20 (was off by one bit, causing wrong MAC decode on real firmware) - Add FIR filter ROM (fir.bin): 52 instructions, assembled from AD example - Add IIR biquad ROM (iir.bin): 28 instructions, assembled from AD example - Add open21xx-compatible source files (build/fir.dsp, build/iir.dsp) - Both ROMs disassemble correctly showing expected DSP patterns: MAC+dual-read kernels, DO UNTIL loops, ASHIFT scaling, RTS(DB) - Full regression: isa_test.bin unchanged
70 lines
2.3 KiB
Plaintext
70 lines
2.3 KiB
Plaintext
/*
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* fir.dsp -- ADSP-2191 FIR filter adapted for open21xx assembler.
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* Based on Analog Devices application note.
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*/
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.section/PM program0;
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.global _start;
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_start:
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/* Setup DAGs */
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i0 = 0x0100; /* delay line */
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i1 = 0x0200; /* input samples */
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i2 = 0x0300; /* output */
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i4 = 0x0400; /* coefficients (PM) */
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l0 = 31; /* circular buffer length */
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l4 = 31;
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m0 = 1;
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m1 = 1;
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m3 = -1;
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m4 = 1;
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/* FIR kernel */
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mr = 0, mx0 = dm(i1,m1), my0 = pm(i4,m4);
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dm(i0,m3) = mx0;
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cntr = 40;
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do _mult_acc until ce;
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/* Inner loop: 30 taps (unrolled) */
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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mr=mr+mx0*my0(ss), mx0=dm(i0,m3), my0=pm(i4,m4);
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/* Last tap + output chain */
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mr=mr+mx0*my0(ss), mx0=dm(i0,m1), my0=pm(i4,m4);
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sr=ashift mr2 (hi), mx0=dm(i1,m1);
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sr=sr or lshift mr1 (lo), dm(i0,m3) = mx0;
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_mult_acc:
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mr = 0, dm(i2,m1) = sr0;
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rts (db);
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mx0 = dm(i0,m1);
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mx0 = dm(i1,m3);
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_halt:
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jump _halt;
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