Files

Dr. Christian Giessen adfc7b34b4 Fix Type 8 decode: correct all bitfield extractions

- DDREG: fixed to bits 7-4 (was bits 8-6, mixed XOP bit into dest)
- SDREG: fixed to bits 3-0 (was bits 5-0, included foreign bits)
- Dest/src registers now correctly use reg0[] table (was xop_alu[])
- NONE pattern: check full bits 7-0 == 0xAA (was only bits 5-0)
- XOP/YOP tables now follow AMF type (MAC vs ALU), not Z bit
- Output format: f(xop, yop), ddreg = sdreg (matches ADI syntax)
- Verified against assembler output for all three Type 8 variants:
  ALU+move, MAC+move, and NONE=ALU status-only
- Full regression: isa_test.bin, fir.bin, iir.bin all unchanged

2026-04-22 19:50:07 +00:00

asm_adsp219x.c

Fix Type 8 decode: correct all bitfield extractions

2026-04-22 19:50:07 +00:00

asm_adsp219x.so

Fix Type 8 decode: correct all bitfield extractions

2026-04-22 19:50:07 +00:00

Makefile

Fix r2 arch plugin for radare2 >= 5.8 RArchPlugin API

2026-04-12 14:45:23 +00:00

README.md

Update all docs and test generator to match verified assembler opcodes

2026-04-22 18:46:54 +00:00

README.md

ADSP-219x Radare2 Plugin

Native architecture plugin for disassembling ADSP-219x (including ADSP-2191) 24-bit instructions in radare2 and iaito.

Build & Install

make
make install

Requires: GCC, radare2 >= 5.8.0 (RArchPlugin API).

Usage

r2 -a adsp219x -b 24 firmware.bin

Validation

Compare against the assembler-verified test ROM:

r2 -a adsp219x -b 24 -q -c "pd 48" ../examples/isa_test.bin

The test ROM (isa_test.dsp) was assembled with open21xx and contains known opcodes for all major instruction types.

Coding Standards

This plugin follows the GNU Coding Standards for C source code. No hardcoded absolute paths in any scripts.