adfc7b34b4
- DDREG: fixed to bits 7-4 (was bits 8-6, mixed XOP bit into dest) - SDREG: fixed to bits 3-0 (was bits 5-0, included foreign bits) - Dest/src registers now correctly use reg0[] table (was xop_alu[]) - NONE pattern: check full bits 7-0 == 0xAA (was only bits 5-0) - XOP/YOP tables now follow AMF type (MAC vs ALU), not Z bit - Output format: f(xop, yop), ddreg = sdreg (matches ADI syntax) - Verified against assembler output for all three Type 8 variants: ALU+move, MAC+move, and NONE=ALU status-only - Full regression: isa_test.bin, fir.bin, iir.bin all unchanged
ADSP-219x Reverse Engineering Toolkit
Radare2 architecture plugin and reference materials for reverse engineering ADSP-2191 firmware.
Contents
r2plugin/ Native radare2 arch plugin (C, GNU style)
examples/ ADSP-2191 assembly examples (FIR, IIR, FFT, Viterbi)
+ assembler-verified ISA test ROM
testrom/ Test ROM generator for plugin validation
docs/ Architecture reference, opcode tables, walkthrough guides
Quick Start
cd r2plugin && make && make install
r2 -a adsp219x -b 24 examples/isa_test.bin
[0x00000000]> pd 48
Requirements
- Radare2 >= 5.8.0 (RArchPlugin API)
- GCC
Plugin Status
Currently decodes: NOP, IDLE, Type 1 (multifunction), Type 3 (direct memory), Type 4 (compute + memory), Type 6/7 (immediate loads), Type 10/10a (jump/call), Type 17 (reg move), Type 20 (RTS/RTI).
Work in progress: Type 9/9a (standalone compute), Type 11 (DO UNTIL), Type 15 (shift), Type 18 (mode control), Type 25 (saturate).
Assembler
The examples were assembled with open21xx,
an open-source assembler/linker for ADSP-218x/219x. Build
instructions are in the open21xx README. The resulting ELF is
converted to raw binary with dd (extract the int_pm section).
License
Plugin code: LGPL-3.0-only. Example code from Analog Devices application notes. Documentation extracts from the ADSP-219x DSP Instruction Set Reference.