Dr. Christian Giessen 62b9363c13 Implement Types 8, 9, 10a, 11, 15, 17, 18, 19, 20, 21, 23, 24, 25, 26, 33, 37 ...

- Type 8: Compute + Dreg move
- Type 9/9a: Standalone ALU/MAC compute (conditional/unconditional)
- Type 10a: Unconditional 16-bit jump/call (fixed bitfield decode)
- Type 10: Conditional 13-bit jump (fixed COND field)
- Type 18: Mode control (ENA/DIS AS, MM, BR, etc.)
- Type 19: Indirect jump/call via Ireg
- Type 20: RTS/RTI with correct COND extraction (fixed bug)
- Type 21: MODIFY(Ireg += Mreg)
- Type 23: DIVQ
- Type 24: DIVS
- Type 25: SAT MR/SR
- Type 26: Push/Pop/Flush Cache
- Type 33: Reg3 = Data12 (short constant load)
- Type 37: SETINT/CLRINT
- Type 15: Sign-extended shift exponent

2026-04-22 19:34:01 +00:00

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