Files

Dr. Christian Giessen 62b9363c13 Implement Types 8, 9, 10a, 11, 15, 17, 18, 19, 20, 21, 23, 24, 25, 26, 33, 37

- Type 8: Compute + Dreg move
- Type 9/9a: Standalone ALU/MAC compute (conditional/unconditional)
- Type 10a: Unconditional 16-bit jump/call (fixed bitfield decode)
- Type 10: Conditional 13-bit jump (fixed COND field)
- Type 18: Mode control (ENA/DIS AS, MM, BR, etc.)
- Type 19: Indirect jump/call via Ireg
- Type 20: RTS/RTI with correct COND extraction (fixed bug)
- Type 21: MODIFY(Ireg += Mreg)
- Type 23: DIVQ
- Type 24: DIVS
- Type 25: SAT MR/SR
- Type 26: Push/Pop/Flush Cache
- Type 33: Reg3 = Data12 (short constant load)
- Type 37: SETINT/CLRINT
- Type 15: Sign-extended shift exponent

2026-04-22 19:34:01 +00:00

asm_adsp219x.c

Implement Types 8, 9, 10a, 11, 15, 17, 18, 19, 20, 21, 23, 24, 25, 26, 33, 37

2026-04-22 19:34:01 +00:00

asm_adsp219x.so

Implement Types 8, 9, 10a, 11, 15, 17, 18, 19, 20, 21, 23, 24, 25, 26, 33, 37

2026-04-22 19:34:01 +00:00

Makefile

Fix r2 arch plugin for radare2 >= 5.8 RArchPlugin API

2026-04-12 14:45:23 +00:00

README.md

Update all docs and test generator to match verified assembler opcodes

2026-04-22 18:46:54 +00:00

README.md

ADSP-219x Radare2 Plugin

Native architecture plugin for disassembling ADSP-219x (including ADSP-2191) 24-bit instructions in radare2 and iaito.

Build & Install

make
make install

Requires: GCC, radare2 >= 5.8.0 (RArchPlugin API).

Usage

r2 -a adsp219x -b 24 firmware.bin

Validation

Compare against the assembler-verified test ROM:

r2 -a adsp219x -b 24 -q -c "pd 48" ../examples/isa_test.bin

The test ROM (isa_test.dsp) was assembled with open21xx and contains known opcodes for all major instruction types.

Coding Standards

This plugin follows the GNU Coding Standards for C source code. No hardcoded absolute paths in any scripts.